MC100ELT23DT Ver la hoja de datos (PDF) - ON Semiconductor
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MC100ELT23DT Datasheet PDF : 8 Pages
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D0 1
D0 2
D1 3
PECL
D1 4
MC100ELT23
8 VCC
7 Q0
TTL
6 Q1
5 GND
Table 1. PIN DESCRIPTION
Pin
Function
Qn
TTL Outputs
Dn, Dn
PECL Differential Inputs
VCC
GND
Positive Supply
Ground
EP
Exposed pad must be connected to a
sufficient thermal conduit. Electrically
connect to the most negative supply or
leave floating open.
Figure 1. 8−Lead Pinout (Top View) and Logic
Diagram
Table 2. ATTRIBUTES
Characteristics
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
Machine Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
SOIC−8
TSSOP−8
DFN8
Flammability Rating
Oxygen Index: 28 to 34
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Value
50 kW
N/A
> 2 kV
> 400 V
Pb Pkg
Pb−Free Pkg
Level 1
Level 1
Level 1
Level 1
Level 3
Level 1
UL 94 V−0 @ 0.125 in
91 Devices
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
VCC
Power Supply
GND = 0 V
VI
Input Voltage
GND = 0 V
TA
Operating Temperature Range
Tstg
Storage Temperature Range
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
Tsol
Wave Solder
Pb <2 to 3 sec @ 248°C
Pb−Free <2 to 3 sec @ 260°C
Condition 2
VI VCC
SOIC−8
SOIC−8
SOIC−8
TSSOP−8
TSSOP−8
TSSOP−8
DFN8
DFN8
Rating
7
0 to 6
−40 to +85
−65 to +150
190
130
41 to 44
185
140
41 to 44 ± 5%
129
84
265
265
Unit
V
V
°C
°C
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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