MBM29BS12DH Ver la hoja de datos (PDF) - Spansion Inc.
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MBM29BS12DH Datasheet PDF : 84 Pages
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MBM29BS/FS12DH15
(Continued)
Command
Sequence
Bus
Write
Cycles
Req’d
First Bus
Write
Cycle
Addr. Data
Second Third Write
Write Cycle Cycle
Addr. Data Addr. Data
Fourth
Write Cycle
Addr. Data
Fifth Write Sixth Write
Cycle
Cycle
Seventh
Write
Cycle
Addr. Data Addr. Data Addr. Data
Password Verify 4 555h AAh 2AAh 55h 555h C8h PWA PWD — — — — — —
Password Mode
Locking Bit
Program
6
555h AAh 2AAh 55h 555h 60h
PL
68h
PL
48h XXh
RD
(0)
—
—
Persistent
Protection Mode
Locking Bit
6
555h AAh 2AAh 55h 555h 60h SPML 68h SPML 48h XXh
RD
(0)
—
—
Program
PPB Program
6
555h
AAh 2AAh
55h
555h
60h
SGA+
WP
68h
SGA+
WP
48h
XXh
RD
(0)
—
—
PPB Verify
4
555h
AAh 2AAh
55h
(BA)
555h
90h
SGA+
WP
RD
(0)
—
—— — ——
All PPB Erase
6
555h AAh 2AAh 55h 555h 60h WPE
60h
WPE
40h XXh
RD
(0)
—
—
PPB Lock Bit
Set
6 555h AAh 2AAh 55h 555h 78h — — — — — — — —
PPB Lock Bit
Verify
4
555h AAh 2AAh 55h 555h 58h
SA
RD
(1)
—
—— — ——
DPB Write
4 555h AAh 2AAh 55h 555h 48h SA X1h — — — — — —
DPB Erase
4 555h AAh 2AAh 55h 555h 48h SA X0h — — — — — —
DPB Verify
4
555h AAh 2AAh 55h 555h 58h
SA
RD
(0)
—
—— — ——
Legend:
RA
= Address of the memory location to be read.
PA
= Address of the memory location to be programmed. Addresses latch on the rising edge of the AVD
pulse or active edge of CLK while AVD = VIL whichever comes first or falling edge of write pulse while
AVD = VIL.
SA
= Address of the sector to be erased. The combination of A22, A21, A20, A19, A18, A17, A16, A15, A14, A13,
and A12 will uniquely select any sector.
BA
= Bank Address. Address settled by A22, A21, A20 will select Bank A, Bank B, Bank C and Bank D.
RD
= Data read from location RA during read operation.
PD
= Data to be programmed at location PA. Data latches on the rising edge of write pulse.
SGA
= Sector group address to be protected.
SD
= Sector group protection verify data.
Output 01h at protected sector group addresses and output 00h at unprotected sector group
addresses.
HRA
= Address of the HiddenROM area 000000h to 00007Fh
HRBA
= Bank Address of the HiddenROM area (A22 = A21 = A20 = VIL)
RD (0) = Read Data bit. If programmed, DQ0 = 1, if erase, DQ0 = 0
RD (1) = Read Data bit. If programmed, DQ1 = 1, if erase, DQ1 = 0
OPBP
= (A7, A6, A5, A4, A3, A2, A1, A0) is (0, 0, 0, 1, 1, 0, 1, 0)
PWA/PWD = Password Address/Password Data
PL
= (A7, A6, A5, A4, A3, A2, A1, A0) is (0, 0, 0, 0, 1, 0, 1, 0)
SPML
= (A7, A6, A5, A4, A3, A2, A1, A0) is (0, 0, 0, 1, 0, 0, 1, 0)
WP
= (A7, A6, A5, A4, A3, A2, A1, A0) is (0, 0, 0, 0, 0, 0, 1, 0)
WPE
= (A7, A6, A5, A4, A3, A2, A1, A0) is (0, 1, 0, 0, 0, 0, 1, 0)
CR
= Configuration Register address bits A19 to A12.
(Continued)
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