MB90485 Ver la hoja de datos (PDF) - Fujitsu

Número de pieza

componentes Descripción

Fabricante

MB90485

16-bit Proprietary Microcontroller

Fujitsu 

MB90480/485 Series

Pin No.

Pin name

LQFP*1 QFP*2

Circuit

type

Function

P45

F MB90480 This is a general purpose I/O port.

A13 (CMOS) series In non-multiplex mode, this pin functions as an external address pin.

22

24

P45

A13

EXTC*3

G

(CMOS/

H)

This is a general purpose I/O port.

MB90485

series

In non-multiplex mode, this pin functions as an external address pin.

µPG input pin (MB90485 series only) .

P46, P47

This is a general purpose I/O port.

23

25 A14, A15 F In non-multiplex mode, this pin functions as an external address pin.

24

26

OUT4/

OUT5

(CMOS)

Output compare event output pins.

68

70

P50

This is a general purpose I/O port. In external bus mode, this pin functions as

D the ALE pin.

ALE

(CMOS) In external bus mode, this pin functions as the address load enable (ALE) sig-

nal pin.

69

71

P51

This is a general purpose I/O port. In external bus mode, this pin functions as

D the RD pin.

RD

(CMOS) In external bus mode, this pin functions as the read strobe output (RD) signal

pin.

P52

This is a general purpose I/O port. In external bus mode, when the WRE pin

in the EPCR register is set to “1”, this pin functions as the WRL pin.

70

72

D

(CMOS) In external bus mode, this pin functions as the lower data write strobe output

WRL

(WRL) pin. When the WRE bit in the EPCR register is set to “0”, this pin func-

tions as a general purpose I/O port.

This is a general purpose I/O port. In external bus mode with 16-bit bus width,

P53

when the WRE bit in the EPCR register is set to “1”, this pin functions as the

WRH pin.

71

73

D

(CMOS) In external bus mode with 16-bit bus width, this pin

WRH

functions as the upper data write strobe output (WRH) pin. When the WRE bit

in the EPCR register is set to “0”, this pin functions as a general purpose I/O

port.

P54

This is a general purpose I/O port. In external bus mode, when the HDE bit in

the EPCR register is set to “1”, this pin functions as the HRQ pin.

72

74

D

(CMOS) In external bus mode, this pin functions as the hold request input (HRQ) pin.

HRQ

When the HDE bit in the EPCR register is set to “0”, this pin functions as a gen-

eral purpose I/O port.

P55

This is a general purpose I/O port. In external bus mode, when the HDE bit in

the EPCR register is set to “1”, this pin functions as the HAK pin.

73

75

D

(CMOS) In external bus mode, this pin functions as the hold

HAK

acknowledge (HAK) pin. When the HDE bit in the EPCR register is set to “0”,

this pin functions as a general purpose I/O port.

(Continued)

10

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