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MB89560H

8-bit Proprietary Microcontroller

Fujitsu 

MB89560H Series

(Continued)

• Three types of Serial Interface:

High Speed UART (Transfer rate from 300 to 192000 bps /10 MHz main clock)

8-bit Serial I/O (SIO)

UART/SIO

• Two type of Programmable Pulse Generator(PPG) : 6-bit PPG and 12-bit PPG

• Six types of timer

8 bit PWM 2 channels timers

8/16 bit timer/counter (8 bits x 2 channels or 16 bits x 1 channel)

21bit timebase timer

8 bit PWC timer operation

Watch prescaler(17 bits)

Watch-dog timer

• I/O ports: max. 50 channels

• External interrupt 1: 8 channels

• External interrupt 2 (wake-up function): 4 channels

• Low-power consumption modes (stop mode, sleep mode, and watch mode)

• LQFP-80 and QFP-80 package

• CMOS technology

s PRODUCT LINEUP

Part number

Parameter

MB89567H

MB89567HC

MB89P568

MB89PV560

Classification

ROM size

RAM size

CPU functions

Ports

21-bit timebase

timer

Watchdog timer

Watch prescaler

8/16-bit timer/

counter

8-bit PWM 2 ch

timer

Mass production products

(mask ROM products)

OTP

Piggy-back

32 K × 8 bits

(internal mask ROM)

48 K × 8 bits

(internal PROM)

56 K × 8 bits

(external ROM)

1K × 8 bits

1K × 8 bits

Number of instructions:

Instruction bit length:

Instruction length:

Data bit length:

Minimum execution time:

Minimum interrupt processing time:

: 136

: 8 bits

: 1 to 3 bytes

: 1, 8, 16 bits

: 0.4 µs/10 MHz

: 3.6 µs/10 MHz

General-purpose I/O ports (N-channel open drain)

General-purpose I/O ports (CMOS)

Total

: 20 pins (2 shared with I2C inputs, 16 shared

with LCD, 2 shared with other resources)

: 30 pins (shared with resources)

: 50 pins

21 bits

Interrupt cycle: 211, 213, 216 or 220 tinst *5

Reset generate cycle: min. 220 tinst for main clock, min. 213 tinst for sub clock

17 bits

Interrupt cycle: 0.50s, 1.00s, 2.00s, 4.00s/32.768 KHz for subclock

Can be operated either as a 2-channel 8-bit timer/counter (Timer 1 and Timer 2, each with its own

independent operating clock cycle), or as one 16-bit timer/counter

In Timer 1 or 16-bit timer/counter operation, event counter operation (external clock-triggered) and

square wave output capable

8-bit interval timer operation (square wave output capable, operating clock cycle: 1, 8, 16, 64 tinst)

8-bit resolution PWM operation (conversion cycle: 256 to 256 x 64 tinst)

8/16-bit timer/counter output for counter clock selectability

2

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