MB88141A Ver la hoja de datos (PDF) - Fujitsu

Número de pieza

componentes Descripción

Fabricante

MB88141A

D/A Converter for Digital Tuning (Compatible with I2C Bus)

Fujitsu 

MB88141A

2. For D/A Converter + I/O Expander Operation (MOD = “H”)

(1) I2C Bus Format

First S6

S0 R/W

D7

D0

Last

S Slave address (7 bits) 1 A Digital data (8 bits) A P

First S6

S0 R/W

C7

C0

D7

D0

Last

S Slave address (7 bits) 0 A

Channel selection

(8 bits)

A Digital data (8 bits) A P

: Sent from master device

: Sent from MB88141A (slave device)

S : “Start” condition

P : “Stop” condition

A : “Acknowledge” output

(2) Slave Address Comparison (7 bits)

Slave address comparison is the same as for D/A converter (12-channel) operation (see “1. (2) “Slave Address

Comparison”), with the exception that the CS2 setting determines the number of D/A converter channels and

the number of I/O expander bits.

CS2

D/A converter

I/O expander

0

4 channels (AO1 to AO4)

8 bits (D7 to D0)

1

8 channels (AO1 to AO8)

4 bits (D3 to D0)

When CS2 = “1” is selected, the upper 4 bits (D7 to D4) of write operations (I2C bus to parallel interface) are

ignored, and the upper 4 bits of read operations (parallel interface to I2C bus) are output at “0” (low) .

(3) R/W Selection (1 bit)

R/W

I/O expander operation

0

I2C bus input → parallel data output

1

Parallel data input → I2C bus output

D/A converter operation

I2C bus input → analog output



10

Share Link: