MB4053 Ver la hoja de datos (PDF) - Fujitsu

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MB4053

6-Channel 8-BIT A/D Converter

Fujitsu 

MB4053

s ZERO OFFSET AND FULL-SCALE FACTOR CORRECTIONS

High precision conversions can be achieved by correcting for zero offset and full scale factor as follows:

The channel select address (A0 to A2) is set to 000. Ground (GND) is selected (internally) as the analog input

and converted. This results in ramp time tR. Next the address is set to 111. VREF is selected (internally) and

converted. This results in ramp time, tREF. Finally the desired analog input (one of I1 to I6) is selected and converted.

This results in ramp time tX. This conversion sequence is arbitrary and the GND and VREF conversions are not

needed each time a channel is converted but only as required for calibration. The relationships between the

inputs and ramp times are shown below.

(VBE1)C = tZ

(VREF + VBE1)C = tREF

(VIN + VBE1)C = tX

(VREF)C = tREF – tZ

(VIN)C = tX – tZ

(VIN)C = tX – tZ

(VREF)C tREF – tZ

VCH

VREF + VBE1

VIN + VBE1

VBE1

VBE2

tZ

tX

tR

tREF

The conversion error can then be minimized by using the above results in the expression below to calculate the

corrected analog input voltage.

(VIN)C = (VREF)C ×

tX – tZ

tREF – tZ

Where: VIN = Analog input voltage to be measured

VREF = Reference voltage

VBE1 = Shift voltage in sample/ramp amplifer

VBE2 = Threshold voltage of comparator

VCH = CH voltage

The GND and VREF conversion sequence is arbitary, the GND and VREF conversions not being needed each time

a channel (I1 to I6) is converted.

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