MAX9539EUI Ver la hoja de datos (PDF) - Maxim Integrated

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MAX9539EUI

Graphics Video Sync Adder/Extractor

Maxim Integrated 

Graphics Video Sync Adder/Extractor

obtained from the red input, vertical sync is obtained

from the blue input, and composite sync is obtained from

the green input. Like the MAX9539, the DC-restore func-

tion removes any DC offset in the RGB video inputs and

sets the output black levels to 0V. This happens at the

back porch (trailing edge) of the sync pulse.

Figure 3 illustrates the functionality of the MAX9540. In

this example, the sync signals are of positive polarity.

DC Restore

The MAX9539/MAX9540 DC-restore function removes

the input signal DC level and restores 0V for the black

level of the output video signal. 1nF restore capacitors

are needed for the sample-and-hold circuitry at

REST_R, REST_G, and REST_B. A value less than

0.5nF can cause AC instability in the sample-and-hold

circuitry. A value higher than 2nF increases the settling

time of the sample-and-hold circuitry, shifting the out-

put black level from 0V.

Sync Polarity

Sync polarity refers to the idle state and pulse ampli-

tude of the sync pulse. A sync pulse that idles low and

pulses high is referred to as a positive sync pulse. A

sync pulse that idles high and pulses low is referred to

as a negative sync pulse as seen in Figure 4. To

accommodate positive and negative sync input signals,

the MAX9539/MAX9540 have vertical and horizontal

sync polarity inputs (SP_V and SP_H). Drive SP_V or

SP_H high for positive sync polarity. Drive SP_V or

SP_H low for negative sync polarity. The MAX9540 also

has a composite polarity input (SP_C). Drive SP_C high

for positive sync polarity or drive SP_C low for negative

sync polarity (Table 1).

Layout and Power-Supply Bypassing

The MAX9539/MAX9540 have an extremely high band-

width and require careful board layout. For best perfor-

mance use constant-impedance microstrip or stripline

techniques.

To realize the full AC performance of these high-speed

amplifiers, pay careful attention to power-supply

bypassing and board layout. The PC board should

have at least two layers: a signal and power layer on

one side, and a large, low-impedance ground plane on

the other side. The ground plane should be as free of

voids as possible. With multilayer boards, locate the

ground plane on a layer that incorporates no signal or

power traces.

Observe the following guidelines when designing the

board regardless of whether or not a constant-imped-

ance board is used.

1) Do not use wire-wrap boards or breadboards.

SYNC TIMING DELAY (tD) = t1 - t2

t1

VIDEO

SYNC

t2

VIDEO WITH SYNC

Figure 1. Sync Timing Delay (tD) = t1 - t2

Table 1. Sync Polarity Table

INPUT LOGIC

VALUE

SP_V

SP_H

1

Positive

sync

Positive

sync

0

Negative

sync

Negative

sync

SP_C

(MAX9540)

Positive

sync

Negative

sync

2) Do not use IC sockets; they increase parasitic

capacitance and inductance.

3) Keep lines as short and as straight as possible. Do

not make 90° turns; round all corners.

4) Observe high-frequency bypassing techniques to

maintain the amplifier’s accuracy and stability.

5) Use surface-mount components. They generally

have shorter bodies and lower parasitic reactance,

yielding better high-frequency performance than

through-hole components.

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