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MAX9169ESE Ver la hoja de datos (PDF) - Maxim Integrated

Número de pieza
componentes Descripción
Fabricante
MAX9169ESE
MaximIC
Maxim Integrated MaximIC
MAX9169ESE Datasheet PDF : 19 Pages
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4-Port LVDS and LVTTL-to-LVDS Repeaters
Pin Description
PIN
MAX9169 MAX9170
1
1
2
2
3
3
4
4
5
5
6
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
6
7
NAME
FUNCTION
EN1
EN2
EN3
VCC
GND
IN+
IN-
EN4
OUT4-
OUT4+
OUT3-
OUT3+
OUT2-
OUT2+
OUT1-
OUT1+
IN
N.C.
OUT1+/OUT1- Enable. +5V tolerant LVTTL/LVCMOS input. Set EN1 high to enable
OUT1+/OUT1-. Set EN1 low to disable OUT1+/OUT1- (high-impedance mode). Integrated
pulldown to GND.
OUT2+/OUT2- Enable. +5V tolerant LVTTL/LVCMOS input. Set EN2 high to enable
OUT2+/OUT2-. Set EN2 low to disable OUT2+/OUT2- (high-impedance mode). Integrated
pulldown to GND.
OUT3+/OUT3- Enable. +5V tolerant LVTTL/LVCMOS input. Set EN3 high to enable
OUT3+/OUT3-. Set EN3 low to disable OUT3+/OUT3- (high-impedance mode). Integrated
pulldown to GND.
Power-Supply Voltage. Bypass with 0.1µF and 0.001µF capacitors to ground.
Ground
Noninverting Differential LVDS Input
Inverting Differential LVDS Input
OUT4+/OUT4- Enable. +5V tolerant LVTTL/LVCMOS input. Set EN4 high to enable
OUT4+/OUT4-. Set EN4 low to disable OUT4+/OUT4- (high-impedance mode). Integrated
pulldown to GND.
Inverting Differential LVDS Output
Noninverting Differential LVDS Output
Inverting Differential LVDS Output
Noninverting Differential LVDS Output
Inverting Differential LVDS Output
Noninverting Differential LVDS Output
Inverting Differential LVDS Output
Noninverting Differential LVDS Output
Data Input, 5V Tolerant LVTTL/LVCMOS. Integrated pulldown to GND.
No Connection
Table 1. MAX9169 Input/Output Functions
INPUT
VID = VIN+ - VIN-
X
+50mV
-50mV
Open
Undriven short
Undriven parallel terminated
EN_
Low or open
High
High
High
High
High
OUTPUT
VOD
High-Z
High
Low
High
High
High
Table 2. MAX9170 Input/Output Functions
VIN
X
High
Low
Open
INPUT
EN_
Low or open
High
High
High
OUTPUT
VOD
High-Z
High
Low
Low
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