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MAX9000

Programmable Logic Device Family

Altera Corporation 

MAX 9000 Programmable Logic Device Family Data Sheet

LABs drive the row and column interconnect directly. Each macrocell can

drive out of the LAB onto one or both routing resources. Once on the row

or column interconnect, signals can traverse to other LABs or to the IOCs.

Figure 2. MAX 9000 Logic Array Block

DIN1

DIN2

DIN3

DIN4

Global Control Select

GCLK1

GCLK2

GCLR

GOE

To Peripheral Bus and

Other LABs in the Device

To Peripheral Bus

Row FastTrack

Interconnect

33

LAB Local Array

(114 Channels)

Shared Expander

Signals

Macrocell 1

Macrocell 2

Macrocell 3

Macrocell 4

Macrocell 5

Macrocell 6

Macrocell 7

Macrocell 8

Macrocell 9

Macrocell 10

Macrocell 11

Macrocell 12

Macrocell 13

Macrocell 14

Macrocell 15

Macrocell 16

16

16

Altera Corporation

16

16

16

48

See Figure 7

for details.

16

48

Column FastTrack

Interconnect

Local Feedback

7

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