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MAX4734(2002) Ver la hoja de datos (PDF) - Maxim Integrated

Número de pieza
componentes Descripción
Fabricante
MAX4734
(Rev.:2002)
MaximIC
Maxim Integrated MaximIC
MAX4734 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
0.8, Low-Voltage, 4-Channel
Analog Multiplexer
Detailed Description
The MAX4734 is a low 0.8max (at V+ = 2.7V) on-
resistance, low-voltage, 4-channel CMOS analog multi-
plexer that operates from a 1.6V to 3.6V single supply.
CMOS switch construction allows switching analog sig-
nals that range from GND to V+.
When powered from a 2.7V supply, the 0.8max RON
allows high continuous currents to be switched in a
variety of applications.
Applications Information
Proper power-supply sequencing is recommended for
all CMOS devices. Do not exceed the absolute maxi-
mum ratings, because stresses beyond the listed rat-
ings can cause permanent damage to the devices.
Always sequence V+ on first, followed by NO_ or COM.
Although it is not required, power-supply bypassing
improves noise margin and prevents switching noise
propagation from the V+ supply to other components.
A 0.1µF capacitor, connected from V+ to GND, is ade-
quate for most applications.
Logic Inputs
The MAX4734 logic inputs can be driven up to 3.6V
regardless of the supply voltage. For example, with a
1.8V supply, A_ and EN may be driven low to GND and
high to 3.6V. Driving A_ and EN rail-to-rail minimizes
power consumption.
Analog Signal Levels
Analog signals that range over the entire supply voltage
(V+ to GND) can be passed with very little change in on-
resistance (see Typical Operating Characteristics). The
switches are bidirectional, so the NO_ and COM_ pins
can be used as either inputs or outputs.
Layout
High-speed switches require proper layout and design
procedures for optimum performance. Reduce stray
inductance and capacitance by keeping traces short
and wide. Ensure that bypass capacitors are as close
to the device as possible. Use large ground planes
where possible.
V+
VEN EN
V+
NO1
NO2–NO4
VNO_
MAX4734
A0
A1
COM
GND
RL
VOUT
35pF
Figure 1. Switching Time
Test Circuits/Timing Diagrams
VEN = VIH + 0.5
50%
0
tR < 5ns
tF < 5ns
V+
VOUT
0
tON
90% 90%
tOFF
_______________________________________________________________________________________ 7

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