MAX3873 Ver la hoja de datos (PDF) - Maxim Integrated

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MAX3873

Low-Power, Compact 2.5Gbps/2.7Gbps Clock-Recovery and Data-Retiming IC

Maxim Integrated 

Low-Power, Compact 2.5Gbps or 2.7Gbps

Clock-Recovery and Data-Retiming IC

VCC + 0.4V

VCC

800mV

25mV

VCC - 0.4V

VCC

VCC - 0.4V

(a) AC-COUPLED SINGLE-ENDED INPUT (CML OR PECL) 25mV

800mV

VCC - 0.8V

(b) DC-COUPLED SINGLE-ENDED CML INPUT

Figure 1. Definition of Input Voltage Swing

tCLK

SCLKO+

SDO

tCLK-Q

Figure 2. Definition of Clock-to-Q Delay

SERIAL DATA

<2µs

1200 BITS OF 1–0 PATTERN

FASTRACK

Figure 3. Definition of Phase Acquisition Time

DATA

VCO CLOCK PHASE ALIGNED TO INPUT DATA

INPUT DATA

LOL OUTPUT

LOL ASSERT TIME

FREQUENCY ACQUISITION TIME

Figure 4. Definition of LOL Assert Time and Frequency Acquisition Time

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