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MAX2102

Direct-Conversion Tuner ICs for Digital DBS Applications

Maxim Integrated 

Direct-Conversion Tuner ICs for

Digital DBS Applications

Pin Description

PIN NAME

1

2

3, 12

4

5

6

7

8

9, 11,

19, 24

VCC

IOUT

GND

VCC

GND

VCC

RFIN

RFIN

GND

10

AGC

13

QOUT

14

VCC

15

QDC

16

QDC

17

IDC

18

IDC

20

VCC

21

LO

22

LO

23

VCC

25 PSGND

26

PSOUT

27

MOD

28

VCC

FUNCTION

Baseband +5V Supply. Bypass with a 10pF capacitor from this pin to pin 3 (GND), as close to the IC as

possible. Connect an additional 0.1µF capacitor in parallel with the 10pF capacitor (placement less critical).

I Channel Baseband Output

Baseband Ground

RF +5V Supply. Bypass with a 22pF capacitor from this pin to pin 11 (GND), as close to the IC as possible.

Ground (substrate)

RF +5V Supply. Bypass with a 22pF capacitor from this pin to pin 9 (GND), as close to the IC as possible.

RF Noninverting Input. Couple through a 22pF capacitor directly to a 50Ω signal source.

RF Inverting Input. Connect to a 22pF series capacitor and a 51Ω resistor to ground.

RF Ground. Connect directly to the ground plane.

Automatic Gain-Control Input. Bypass this pin with a 1000pF capacitor close to the pin, to minimize cou-

pling.

Q Channel Baseband Output

Baseband +5V Supply. Bypass with a 10pF capacitor from this pin to pin 12 (GND), as close to the IC as

possible. Connect an additional 0.1µF capacitor in parallel with the 10pF capacitor (placement less critical).

Q Channel Offset-Correction Noninverting Input. Connect a 0.22µF (typ) capacitor between QDC and QDC.

This capacitor must be placed as close to the IC as possible (see Layout Considerations section).

Q Channel Offset-Correction Inverting Input. Connect a 0.22µF (typ) capacitor between QDC and QDC. This

capacitor must be placed as close to the IC as possible (see Layout Considerations section).

I Channel Offset-Correction Inverting Input. Connect a 0.22µF (typ) capacitor between IDC and IDC. This

capacitor must be placed as close to the IC as possible (see Layout Considerations section).

I Channel Offset-Correction Noninverting Input. Connect a 0.22µF (typ) capacitor between IDC and IDC.

This capacitor must be placed as close to the IC as possible (see Layout Considerations section).

RF +5V Supply. Bypass with a 10pF capacitor from this pin to pin 19 (GND) as close to the IC as possible.

Local-Oscillator Complementary Input Port (Figure 1)

Local-Oscillator Input Port (Figure 1)

RF +5V Supply. Bypass with a 10pF capacitor from this pin to pin 24 (GND) as close to the IC as possible.

Prescaler Ground. To disable the prescaler, leave this pin open.

Prescaler Output. Drives CMOS load. Connect 2kΩ from this pin to GND (if the prescaler is enabled).

Prescaler Modulus Control. Leave open when the prescaler is disabled.

Prescaler +5V Supply. Must be connected even if the prescaler is disabled. Bypass with a 1000pF

capacitor.

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