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MAX1693(1999) Ver la hoja de datos (PDF) - Maxim Integrated

Número de pieza
componentes Descripción
Fabricante
MAX1693
(Rev.:1999)
MaximIC
Maxim Integrated MaximIC
MAX1693 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
USB Current-Limited Switches
with Fault Blanking
momentary short-circuit faults that occur when hot-
swapping a capacitive load, and also ensures that no
fault is issued during power-up. When a load transient
causes the device to enter current limit, an internal
counter starts. If the load fault persists beyond the
10ms fault-blanking timeout, the FAULT output asserts
low. Ensure that the MAX1693/MAX1694’s input is ade-
quately bypassed to prevent input glitches from trigger-
ing spurious FAULT outputs. Input voltage glitches less
than 150mV will not cause a spurious FAULT output.
Load-transient faults less than 10ms (typ) will not cause
a FAULT output assertion.
Only current-limit faults are blanked. Die overtempera-
ture faults and input voltage droops below the UVLO
threshold will cause an immediate fault output.
Fault Latching (MAX1694 Only)
The MAX1694 features a latched FAULT output.
Whenever the FAULT output is activated, it latches the
FAULT output low and also turns the switch off. To clear
the latch, either cycle the ON input or cycle the input
voltage below UVLO.
Applications Information
Input Capacitor
To limit the input voltage drop during momentary output
short-circuit conditions, connect a capacitor from IN to
GND. A 1µF ceramic capacitor will be adequate for most
applications; however, higher capacitor values will fur-
ther reduce the voltage drop at the input. See Figure 2.
Output Capacitor
Connect a 0.1µF capacitor from OUT to GND. This cap-
acitor helps prevent inductive parasitics from pulling
OUT negative during turn-off.
Layout and Thermal Dissipation
To optimize the switch-response time to output short-
circuit conditions, it is very important to keep all traces
as short as possible to reduce the effect of undesirable
parasitic inductance. Place input and output capacitors
as close to the device as possible (no more than 5mm).
All IN and all OUT pins must be connected with short
traces to the power bus. Wide power bus planes will
provide superior heat dissipation through the switch IN
and OUT pins. Figure 3 shows suggested pin connec-
tions for a single-layer board.
Under normal operating conditions, the package can
dissipate and channel heat away. Calculate the maxi-
mum power dissipation as follows:
P = (ILIMIT)2 · RON
where ILIMIT is the preset current limit (1.0A max) and
RON is the on-resistance of the switch (125mmax).
When the output is short-circuited, foldback-current lim-
iting activates and the voltage drop across the switch
equals the input supply. The power dissipated across
the switch increases, as does the die temperature. If the
fault condition is not removed, the thermal-overload-pro-
tection circuitry activates (see the Thermal Shutdown
section). Wide power-bus planes connected to IN and
OUT and a ground plane in contact with the device will
help dissipate additional heat.
Chip Information
TRANSISTOR COUNT: 715
INPUT
+2.7V TO +5.5V
IN
OUT
1µF
100k
MAX1693
MAX1694
FAULT
OFF
ON
ON
GND
OUTPUT
0.1µF*
*USB SPECIFICATIONS REQUIRE A LARGER CAPACITOR
Figure 2. Typical Application Circuit
MAX1693
MAX1694
1
IN
2
OUT
3
IN
4
OUT
5
ON
OUT
10
IN
9
OUT
8
FAULT
7
GND
6
Figure 3. IN and OUT Cross Connections for a Single-Layer
Board
_______________________________________________________________________________________ 7

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