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MAX16010TA_-T Ver la hoja de datos (PDF) - Maxim Integrated

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MAX16010TA_-T Datasheet PDF : 12 Pages
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Ultra-Small, Overvoltage Protection/
Detection Circuits
VBATT
R1
VCC
IN+
RPULLUP
R2
REF MAX16012 OUT
OUT
IN-
GND
P1
P2
VBATT
VCC
GATE1
GATE2
R1
MAX16013
SET
R2
GND
Figure 2. Typical Operating Circuit for the MAX16012
Figure 3. Overvoltage Limiter Protection
The MAX16013/MAX16014 can be configured as an
overvoltage switch controller to turn on/off a load (see
the Typical Application Circuit). When the programmed
overvoltage threshold is tripped, the internal fast com-
parator turns off the external p-channel MOSFET (P2),
pulling GATE2 to VCC to disconnect the power source
from the load. When the monitored voltage goes below
the adjusted overvoltage threshold, the MAX16013
enhances GATE2, reconnecting the load to the power
source (toggle ENABLE on the MAX16014 to reconnect
the load). The MAX16013 can be configured as an
overvoltage limiter switch by connecting the resistive
divider to the load instead of VCC (Figure 3). See the
Overvoltage Limiter section.
Supply Voltage
Connect a 5.5V to 72V supply to VCC for proper opera-
tion. For noisy environments, bypass VCC to GND with a
0.1µF or greater capacitor. When VCC falls below the
UVLO voltage the following states are present (Table 1).
Table 1. UVLO State (VCC < VUVLO)
PART OUTA
OUTB
MAX16010 Low Low
OUT GATE2
MAX16011
Low
Low, LOGIC = low
High, LOGIC = high
MAX16012 —
Low
MAX16013
MAX16014
High
Hysteresis
Hysteresis adds noise immunity to the voltage monitors
and prevents oscillation due to repeated triggering
when the monitored voltage is near the threshold trip
voltage. The hysteresis in a comparator creates two trip
points: one for the rising input voltage (VTH+) and one
for the falling input voltage (VTH-). These thresholds are
shown in Figure 4.
Enable Inputs (EN or EN)
The MAX16011 offers an active-high enable input (EN),
while the MAX16010 offers both an active-high enable
input (EN) and active-low enable input (EN). For the
MAX16010, drive EN low or EN high to force the output
low. When the device is enabled (EN = high and EN =
low) the state of OUTA and OUTB depends on INA+
and INB- logic states.
VHYST
VTH+
VIN+
VTH-
VCC
VOUT
0V
tPROP
tPROP
tPROP
Figure 4. Input and Output Waveforms
_______________________________________________________________________________________ 7

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