MASW-009590-000DIE
Bumped GaAs SPDT Switch
DC - 8.0 GHz
Electrical Specifications: TA = 25°C, Z0 = 50 Ω, VC = 0 V / 3 V, 22 pF Capacitor 5,6
Parameter
Test Conditions
Units Min.
Typ.
Insertion Loss 7
2.0 - 6.0 GHz
6.0 - 8.0 GHz
dB
—
—
0.50
0.55
Isolation
2.4 GHz
5.3 GHz
5.8 GHz
6.0 - 8.0 GHz
26.5
27.5
dB
21
20
22
21
—
18
Return Loss
DC - 8.0 GHz
dB
—
18
Input IP2
Two Tone, +15 dBm / Tone, 10 MHz Spacing
6.0 GHz
dBm
—
85
Input IP3
Two Tone, +15 dBm / Tone, 10 MHz Spacing
6.0 GHz
dBm
—
52
Input P0.1dB
2.4 - 5.8 GHz
dBm
—
26
Input P1dB
2.4 - 5.8 GHz
dBm
—
30
T-rise, T-fall
10% to 90% RF and 90% to 10% RF
ns
—
13
Ton, Toff
50% control to 90% RF and 50% control to 10% RF ns
—
18
Transients
mV
—
24
Gate Lag
10% RF to 97.5% RF
ns
—
27
Control Current
|VC| = 3 V
µA
—
1
5. For positive voltage control, external DC blocking capacitors are required on all RF ports.
6. Electrical minimum and maximum specifications are guaranteed in final package assembly only.
7. Insertion loss can be optimized by varying the DC blocking capacitor value.
Rev. V1
Max.
0.80
—
—
—
—
—
—
—
—
—
—
—
—
—
—
5
Truth Table 8
Control VC1 Control VC2
1
0
RFC– RF1
On
RFC—RF2
Off
0
1
Off
On
8. 1 = +1.8 V (for (Vhi-Vlo) < 1.8V, add a 20K Ω pull up resistor
from RFC to Vhi) to +5 V, 0 = 0 V + 0.2 V.
2
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is considering for development. Performance is based on target specifications, simulated results,
and/or prototype measurements. Commitment to develop is not guaranteed.
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Solutions has under development. Performance is based on engineering tests. Specifications are
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changes to the product(s) or information contained herein without notice.