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M95128-MB3G

128 Kbit serial SPI bus EEPROM with high speed clock

STMicroelectronics 

Description

1

Description

M95128, M95128-W, M95128-R

The M95128, M95128-W and M95128-R are electrically erasable programmable memory

(EEPROM) devices accessed by a high speed SPI-compatible bus. The memory array is

organized as 16384 x 8 bits.

The device is accessed by a simple serial interface that is SPI-compatible. The bus signals

are C, D and Q, as shown in Table 1 and Figure 1.

The device is selected when Chip Select (S) is taken Low. Communications with the device

can be interrupted using Hold (HOLD).

In order to meet environmental requirements, ST offers these devices in ECOPACK®

packages. ECOPACK® packages are Lead-free and RoHS compliant.

ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.

Figure 1. Logic diagram

VCC

D

C

S

W

HOLD

Q

M95128

VSS

AI12805

Figure 2. SO, UFDFPN and TSSOP connections

M95128

S1

Q2

W3

VSS 4

8 VCC

7 HOLD

6C

5D

AI12806

1. See Section 10: Package mechanical for package dimensions, and how to identify pin-1.

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