M95128-RM95128-MN6P Ver la hoja de datos (PDF) - STMicroelectronics

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M95128-RM95128-MN6P

128 Kbit Serial SPI bus EEPROM with high speed clock

STMicroelectronics 

M95128, M95128-W, M95128-R

3

Signal description

Signal description

See Figure 1: Logic diagram and Table 1: Signal names, for a brief overview of the signals

connected to this device.

3.1

Serial Data Output (Q)

This output signal is used to transfer data serially out of the device. Data is shifted out on the

falling edge of Serial Clock (C).

3.2

Serial Data Input (D)

This input signal is used to transfer data serially into the device. It receives instructions,

addresses, and the data to be written. Values are latched on the rising edge of Serial Clock

(C).

3.3

Serial Clock (C)

This input signal provides the timing of the serial interface. Instructions, addresses, or data

present at Serial Data Input (D) are latched on the rising edge of Serial Clock (C). Data on

Serial Data Output (Q) changes after the falling edge of Serial Clock (C).

3.4

Chip Select (S)

When this input signal is High, the device is deselected and Serial Data Output (Q) is at high

impedance. Unless an internal Write cycle is in progress, the device will be in the Standby

Power mode. Driving Chip Select (S) Low selects the device, placing it in the Active Power

mode.

After Power-up, a falling edge on Chip Select (S) is required prior to the start of any

instruction.

3.5

Hold (HOLD)

The Hold (HOLD) signal is used to pause any serial communications with the device without

deselecting the device.

During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data

Input (D) and Serial Clock (C) are Don’t Care.

To start the Hold condition, the device must be selected, with Chip Select (S) driven Low.

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