L6245 Ver la hoja de datos (PDF) - STMicroelectronics

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L6245

5V HARD DISK DRIVE POWER COMBO

STMicroelectronics 

L6245

The head load /unload mechanisms are just buff-

ers for driving external power transistors. Control-

led internally by Bit 3 and Bit 4 of the VCM Driver

Register, each output has a current surcing capa-

bility of 10mA.

The Sensorless Spindle Driver function can be

accessed from the microprocessor over the data

bus to the Spin Register and Spin D/A. The Spin

D/A is in Binary format. The operation of the Spin-

dle system is controlled entirely by the microproc-

essor from start-up to speed regulaton. The spin

system is accessible by selecting the Spin Control

Register with the address 011 on the 3 bit ad-

dress bus and has the following functions:

1)Enable (Bit 0): high to enable the spin sys-

tem, while a low asserts braking of the

spindle motor (if VCR enable is low.)

2)Sense amplifier gain (Bit 1): high implies

high current mode which is equivalent to

low sense amp gain, while a low selects

low current mode or high sense amp

gain.

3)Unipolar/Bipolar (Bit 2): High selects the

Unipolar driving mode.

4)Run/Search Mode (Bit 3): high selects the

run mode whereby the Hall synthesizer

output gives speed information while a low

asserts the search mode whereby the se-

quencer is under µP control (stepper func-

tion).

5)Reset State (Bit 4): a low level resets the

commutation state sequencer.

6)Incremental state (Bit 5): toggling of the bit

increments the sequencer to drive the

output stage when search mode is se-

lected.

7)Linear/PWM (Bit 6): high selects linear

mode of driving for current (speed) regu-

lation while a low sets to PWM mode used

during start-up.

Start-up current limiting is accomplished by the

output of the microprocessor commanded D/A

value. Jammed or stuck rotor detection is also

done as part of the microprocessor algorithm. In-

tegrated diode are present in the power bridge for

BEMF rectification. This rectified voltage is used

to retract the actuator and unload or latch the

head assembly.

A conventional Bandgap is used to generate in-

ternal biasing for the device as well as the refer-

ence voltage for the D/A converters.

A Step-up Converter is used to generate a 15V

internal supply to drive the upper DMOSs and a

regulated 11.6V internal supply to power internal

circuits which have voltage head room problem,

as well as to drive the lower DMOSs.

A Low Voltage Detector (LVD) is incorporated to

sense a severely low value of applied voltage so

as to shunt-down the VCM and Spindle drivers.

The LVD is activated when the applied voltage

drops below 4.3V (+/-0.1V). When a voltage drop

is sensed, the LVD:

1. asserts POR, which resets the internal register ;

2. retracts the actuator ;

3. applies the dynamic brake.

When a severe low value of applied voltage is

sensed, the motor control system goes into reset

mode and also asserts the POR line to reset

other circuits. The sub-circuit which get affected

by the reset mode in the motor control system are

the Spin Control Register, the VCM Driver Regis-

ter, the Spindle D/A and the VCM D/A. This effec-

tively disables the spin driver, VCM driver, head

load/unload driver and initializes the D/A’s at zero

output command value.

An Over Velocity Detector circuit is integrated to

sense when head arms are moving at a speed

which could cause a damaging condition. When

an over velocity condition is detected sensing the

actuator BEMF, the actuator driver is shut off and

held off until the microprocessor has detected this

condition and then resets the error and retries the

access.

The microprocessor has the possibility to put the

device in sleep mode, which is asserted when

both the VCM and Spindle drivers are disabled

through the internal registers (Enable VCM and

Enable Spindle). Under this condition, only the

POR circuit is kept ”alive”, thus power consump-

tion is kept at minimal. Before sleep mode is acti-

vated, the microprocessor must move the actua-

tor to the unload zone, unload the recording

heads, and apply dynamic braking.

All bits of all the registers are readable by the mi-

croprocessor interface. Also there are certain bits

of the internal registers which are writable as de-

fined in the Register Definition Tables (Tables 1 -

7).

An internal register monitors the internal work of

the system and latches certain error condition that

are detected.

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