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M95128-DW3/P Ver la hoja de datos (PDF) - STMicroelectronics

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M95128-DW3/P Datasheet PDF : 41 Pages
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Summary description
1
Summary description
M95128, M95128-W, M95128-R
These electrically erasable programmable memory (EEPROM) devices are accessed by a
high speed SPI-compatible bus. The memory array is organized as 16384 x 8 bits.
The device is accessed by a simple serial interface that is SPI-compatible. The bus signals
are C, D and Q, as shown in Table 1 and Figure 1.
The device is selected when Chip Select (S) is taken Low. Communications with the device
can be interrupted using Hold (HOLD).
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. ECOPACK® packages are Lead-free and RoHS compliant.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
Figure 1. Logic diagram
VCC
D
C
S
W
HOLD
Q
M95128
VSS
AI12805
Figure 2. SO and TSSOP connections
M95128
S1
Q2
W3
VSS 4
8 VCC
7 HOLD
6C
5D
AI12806
1. See Section 10: Package mechanical for package dimensions, and how to identify pin-1.
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