M68Z128
Figure 4. Block Diagram
A
(9)
A
CHIP ENABLE.
DQ
(8)
DQ
CHIP
ENABLE
W
E1
E2
G
ROW
DECODER
MEMORY
ARRAY
VCC
VSS
INPUT
DATA
CTRL
I/O CIRCUITS
COLUMN
DECODER
CHIP ENABLE.
(8)
A
A
AI00665
Table 6. DC Characteristics
(TA = 0 to 70°C; VCC = 5V ±10%)
Symbol
Parameter
Test Condition
ILI Input Leakage Current
0V ≤ VIN ≤ VCC
ILO Output Leakage Current
0V ≤ VOUT ≤ VCC
ICC1 (1) Supply Current
VCC = 5.5V, (-55)
ICC2 (2) Supply Current (Standby) TTL
VCC = 5.5V, E1 = VIH or
E2 = VIL, f =0
ICC3 (3)
Supply Current (Standby) CMOS
VCC = 5.5V, E1 ≥ VCC – 0.3V
or E2 ≤ 0.3V, f = 0
VIL Input Low Voltage
VIH Input High Voltage
VOL Output Low Voltage
IOL = 2.1mA
VOH Output High Voltage
IOH = –1mA
Note: 1. Average AC current, Outputs open, cycling at tAVAV minimum.
2. All other Inputs at VIL ≤ 0.8V or VIH ≥ 2.2V.
3. All other Inputs at VIL ≤ 0.3V or VIH ≥ VCC –0.3V.
Min
–0.3
2.2
2.4
4/12
Typ
Max Unit
±1
µA
±1
µA
30
70
mA
0.1
2
mA
0.4
20
µA
0.8
V
VCC + 0.3 V
0.4
V
V