M65665 Ver la hoja de datos (PDF) - MITSUBISHI ELECTRIC
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componentes Descripción
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M65665 Datasheet PDF : 15 Pages
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MITSUBISHI DIGITAL TV ICs
M65665SP/FP
Internal register inf ormation (preliminary )
PICTURE-IN-PICTURE SIGNAL PROCESSING
address bit
sy m bol
00h <7> DISP
<6> SIZE_V
<5> SIZE_H
<4> WEN
<3> BGC
<2> BGCS
<1> FREE_RUN
<0> RVS
01h <7:0> VXA<7:0>
02h <7:0> HXA<7:0>
03h <7> DECODE
<6:0> CONTRAST<6:0>
04h <7> KILLER
<6:0> U_DAC<6:0>
05h <7> GRC
<6> YUVN_RGB_SEL
<5:0> TINT<5:0>
06h <7:6> EXT_SC_SEL<1:0>
<5:4> DCONT<1:0>
Reset val. 1/9 ex.
remarks
0 1 Sub picture display : [0] of f , [1] on
0 0 Sub picture v ertical size : [0] 1/9, [1] 1/16
0 0 Sub picture horizontal size : [0] 1/9, [1] 1/16
0 1 Sub picture : [0] Still, [1] Mov ing
0 0 Back ground display : [0] of f , [1] on
0 0 Sub picture mute : [0] of f , [1] on
0 VCXO oscilation : [0] Lock, [1] Free run
0 0 HD/VD input synchronous mode selection : [0] sy nc., [1] asy nc.
20h Sub picture v ertical position
20h Sub picture horizontal position
0 0 Sub picture color decoder reset : [1] reset
32h Sub picture Y or R DAC output amplitude control
0 0 Sub picture color killer : [0] enable, [1] disable
32h Sub picture U or G DAC output amplitude control
1 Frame display : [0] of f , [1] on
0 0 PIP output mode selection : [0] YUV, [1] RGB
00h 00h Sub picture tint control
0h 0h Sub picture C-Sy nc sep. input selection :
[0] Digital, [1] int. Auto slice [2] external (18 pin), [3] Int. analog
0 0 Sub picture sy nc sep.threshold setting (analog/digital)
<3:0> HT<3:0>
07h <7:6> INPUT_SEL<1:0>
<5:0> BG_START<5:0>
Ah Sub picture display timing adjust
2h Sub picture input selection : [0] YC, [1] N.A., [2]CVBS, [3] YUV
0Eh Sub picture BGP position setting
08h <7:4> ADJ<3:0>
<3:0> YDL<3:0>
09h <7:5> BGBY <2:0>
<4:0> Y_OFFSET<4:0>
0Ah <7> VCHIP_ONLY
<6:4> BGRY<2:0>
<3:0> BGY <3:0>
0Bh <7:4> PEDESTV<3:0>
<3:0> PEDESTU<3:0>
0Ch <7> UV_FILTER_OFF
<6> SET_ACC
<5:4> SYSTEM_MODE<1:0>
<3> SET_SIZE
<2> SET_VCHIP
<1:0> SYNC_DELAY <1:0>
2h Main/Sub switch delay control
5h Sub picture Y/C delay adjust
0h 0h Back ground U lev el setting
0Fh Sub picture Y bright control
0 0 V-chip decode mode : [0] of f , [1] on
0h 0h Back ground V lev el setting
Ch Back ground Y lev el setting
0h 0h Sub picture V pedestal lev el (2's comp)
0h 0h Sub picture U pedestal lev el (2's comp)
0 0 Sub picture U, V output f ilter : [0]on, [1]of f
0 0 Address 0Dh, 0Eh setting mode : [0]def ault, [1] enable to set
0h 0h Sy stem : [0]NTSC , [1]PAL-M, [2]PAL-N, [3] N.A.
0 0 Address 11h - 14h setting mode : [0]def ault, [1] enable to set
0 0 Address 15h - 17h setting mode : [0]def ault , [1] enable to set
0 0 Sub picture sy nc.delay control
0Dh <7:4> YUV_COL<3:0>
0h
<3> C_GAIN_SEL
0
<2> WDOF_KILLER_ON
0h
<1> EDGE_RES
0h
<0> CVF
0h
0Eh <7> BITSEL
0
<6> AFCBITSEL
0
<5:0> ACC_LEVEL<5:0>
0Fh <7> AUTO_ENABLE
0
<6> BURST_CLOCK_MODE 0
<5> PALN_DISABLE
0
<4> INV_WFF
0
<3> INV_RFF
0
<2> VMODE
0
<1> RFF_FIX
0
<0> AUTO_RFF_FIX
0
0h Sub picture color control parameter when YUV input
0 Sub picture chroma : [0] x1, [1] x2
0h Sub picture killer on when its v ert. sy nc lost : [0] on, [1] of f
0h f or test : 0 set only
0h Internal chroma comb f ilter : [0] on : [1] of f
0 Sub picture Y clamp time constant : [0] x2, [1] x1
0 Sub picture AFC time constant : [0] x2, [1] x1
15h Sub picture color decoder amplitude
0 Sy stem automatic judgment : [0] of f , [1] on
0 VCXO mode selection : [0] 1H based, [1] 2H based
0 Main picture PAL-N : [0] enable, [1] disable
0 Inv ert sub picture f ield def inition : [0] normal, [1] inv ert
0 Inv ert main picture f ield def inition : [0] normal, [1] inv ert
0 Vertical display m odewhen PAL-N input : [0] normal, [1] wide
0 Main picture f ield f ix : [0] not f ix, [1]f ix
1 Automatic 50/60Hz Judgment : [0] enable, [1] disable
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