M5M5V408BFP Ver la hoja de datos (PDF) - Mitsumi

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M5M5V408BFP

4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM

Mitsumi 

revision-K2.0e, ' 99.03.10

M5M5V408BFP,TP,RT,KV

MITSUBISHI LSIs

Write cycle (S control mode)

A0~18

S

W

DQ1~8

tsu (A)

(Note5)

(Note3)

4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM

tCW

tsu (S)

trec (W)

(Note4)

tsu (D) th (D)

DATA IN

STABLE

(Note3)

Note 3: Hatching indicates the state is "don't care".

Note 4: A Write occurs during the overlap of a low S and a low W.

Note 5: If W goes low simultaneously with or prior to S,the output remains in the high impedance state.

Note 6: Don't apply inverted phase signal externally when DQ pin is in output mode.

MITSUBISHI ELECTRIC

7

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