M59DR016 Ver la hoja de datos (PDF) - STMicroelectronics
Número de pieza
componentes Descripción
Fabricante
M59DR016 Datasheet PDF : 37 Pages
| |||
M59DR016C, M59DR016D
Figure 2. TFBGA Connections (Top view through package)
1
2
3
4
5
6
7
8
A
A13
A11
A8
VPP
WP
A19
A7
A4
B
A14
A10
W
RP
A18
A17
A5
A2
C
A15
A12
A9
NC
NC
A6
A3
A1
D
A16
DQ14
DQ5
DQ11
DQ2
DQ8
E
A0
E
VDDQ DQ15
DQ6
DQ12
DQ3
DQ9
DQ0
VSS
F
VSS
DQ7
DQ13
DQ4
VDD
DQ10
DQ1
G
AI04113
Table 1. Signal Names
A0-A19
Address Inputs
DQ0-DQ15 Data Input/Outputs, Command Inputs
E
Chip Enable
G
Output Enable
W
Write Enable
RP
Reset/Power Down
WP
Write Protect
VDD
Supply Voltage
VDDQ
Supply Voltage for Input/Output
Buffers
VPP
Optional Supply Voltage for
Fast Program & Erase
VSS
Ground
NC
Not Connected Internally
DESCRIPTION
The M59DR016 is a 16 Mbit non-volatile Flash
memory that may be erased electrically at block
level and programmed in-system on a Word-by-
Word basis using a 1.65V to 2.2V VDD supply for
the circuitry. For Program and Erase operations
the necessary high voltages are generated inter-
nally. The device supports asynchronous page
mode from all the blocks of the memory array.
The array matrix organization allows each block to
be erased and reprogrammed without affecting
other blocks. All blocks are protected against pro-
gramming and erase at Power Up. Blocks can be
unprotected to make changes in the application
and then reprotected.
Instructions for Read/Reset, Auto Select, Write
Configuration Register, Programming, Block
Erase, Bank Erase, Erase Suspend, Erase Re-
sume, Block Protect, Block Unprotect, Block Lock-
ing, CFI Query, are written to the memory through
a Command Interface using standard micropro-
cessor write timings.
The device is offered in TFBGA48 (0.75 mm pitch)
packages and it is supplied with all the bits erased
(set to ‘1’).
2/37
Share Link: 