M58WR128EB10ZB6T Ver la hoja de datos (PDF) - STMicroelectronics

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Fabricante

M58WR128EB10ZB6T

128 Mbit (8Mb x 16, Multiple Bank, Burst) 1.8V Supply Flash Memory

STMicroelectronics 

M58WR128ET, M58WR128EB

Table 46. Command Interface States - Lock Table, Next State

Next CI State After Command Input

Current CI State

Lock/CR

Setup(4)

OTP Setup

Block Lock

Block

Lock-Down

(4)

Confirm

Confirm

Set CR

Confirm

EFP Exit,

Quad EFP

Exit (3)

Illegal

Command

(5)

Ready

Lock/CR

Setup

OTP Setup

Ready

Lock/CR Setup

Ready (Lock error)

Ready

Ready (Lock error)

OTP

Setup

Busy

OTP Busy

Setup

Program Busy

Program Busy

Program Busy

Suspend

Program Suspended

P/E. C.

Operation

Completed

N/A

N/A

N/A

Ready

N/A

Ready

N/A

Setup

Ready (error)

Busy

Erase Busy

Erase

Suspend

Lock/CR

Setup in

Erase

Suspend

Erase Suspended

Program in

Erase

Suspend

Setup

Busy

Suspend

Program in Erase Suspend Busy

Program in Erase Suspend Busy

Program in Erase Suspend Suspended

Lock/CR Setup

in Erase Suspend

Erase Suspend (Lock error)

Erase Suspend

Setup

Ready (error)

EFP

Busy

EFP Busy (2)

Verify

EFP Verify (2)

QuadEFP

Setup

Busy

Quad EFP Busy (2)

Quad EFP Busy (2)

N/A

Ready

N/A

N/A

Erase

Suspended

N/A

Erase Suspend (Lock

error)

N/A

N/A

EFP Verify EFP Busy(2)

N/A

Ready EFP Verify(2) Ready

N/A

Ready

Quad EFP

Busy(2)

Ready

Note: 1. CI = Command Interface, CR = Configuration Register, EFP = Enhanced Factory Program, Quad EFP = Quadruple Enhanced Fac-

tory Program, P/E. C. = Program/Erase Controller.

2. EFP and Quad EFP are allowed only when Status Register bit SR0 is set to ‘0’. EFP and Quad EFP are busy if Block Address is

first EFP Address. Any other commands are treated as data.

3. EFP and Quad EFP exit when Block Address is different from first Block Address and data is FFFFh.

4. If the P/E.C. is active, both cycles are ignored.

5. Illegal commands are those not defined in the command set.

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