M48Z2M1V(2003) Ver la hoja de datos (PDF) - STMicroelectronics
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M48Z2M1V Datasheet PDF : 17 Pages
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M48Z2M1Y, M48Z2M1V
Table 5. DC Characteristics
Sym
Parameter
Test Condition(1)
M48Z2M1Y
Min
Max
M48Z2M1V
Unit
Min
Max
ILI(2) Input Leakage Current
0V ≤ VIN ≤ VCC
±4
±4
µA
ILO(2) Output Leakage Current
0V ≤ VOUT ≤ VCC
±4
±4
µA
ICC Supply Current
E = VIL,
Outputs open
140
50
mA
ICC1 Supply Current (Standby) TTL
E = VIH
10
2
mA
ICC2 Supply Current (Standby) CMOS
E ≥ VCC – 0.2V
8
1
mA
VIL Input Low Voltage
–0.3
0.8
–0.3
0.6
V
VIH Input High Voltage
2.2 VCC + 0.3 2.2 VCC + 0.3 V
VOL Output Low Voltage
IOL = 2.1mA
0.4
0.4
V
VOH Output High Voltage
IOH = –1mA
2.4
2.2
V
Note: 1. Valid for Ambient Operating Temperature: TA = 0 to 70°C; VCC = 4.5 to 5.5V or 3.0 to 3.6V (except where noted).
2. Outputs deselected.
OPERATION MODES
The M48Z2M1Y/V has its own Power-fail Detect
Circuit. The control circuitry constantly monitors
the single 5V supply for an out of tolerance condi-
tion. When VCC is out of tolerance, the circuit write
protects the SRAM, providing a high degree of
Table 6. Operating Modes
Mode
VCC
E
G
Deselect
VIH
X
WRITE
READ
3.0 to 3.6V
or
4.5 to 5.5V
VIL
X
VIL
VIL
READ
VIL
VIH
Deselect VSO to VPFD (min)(1)
X
X
Deselect
≤ VSO(1)
X
X
Note: X = VIH or VIL; VSO = Battery Back-up Switchover Voltage.
1. See Table 10, page 12 for details.
data security in the midst of unpredictable system
operations brought on by low VCC. As VCC falls be-
low approximately 3V, the control circuitry con-
nects the batteries which sustain data until valid
power returns.
W
DQ0-DQ7
X
High Z
VIL
DIN
VIH
DOUT
VIH
High Z
X
High Z
Power
Standby
Active
Active
Active
CMOS Standby
X
High Z
Battery Back-up Mode
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