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M36W0R6040B0

64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 16 Mbit (1Mb x16) PSRAM, Multi-Chip Package

STMicroelectronics 

M36W0R6040T0

M36W0R6040B0

64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory

and 16 Mbit (1Mb x16) PSRAM, Multi-Chip Package

FEATURES SUMMARY

■ MULTI-CHIP PACKAGE

– 1 die of 64 Mbit (4Mb x 16) Flash Memory

– 1 die of 16 Mbit (1Mb x 16) Pseudo SRAM

■ SUPPLY VOLTAGE

– VDDF = VDDP = VDDQ = 1.7V to 1.95V

■ LOW POWER CONSUMPTION

■ ELECTRONIC SIGNATURE

– Manufacturer Code: 20h

– Device Code (Top Flash Configuration),

M36W0R6040T0: 8810h

– Device Code (Bottom Flash

Configuration), M36W0R6040B0: 8811h

■ PACKAGES

– Compliant with Lead-Free Soldering

Processes

– Lead-Free Versions

FLASH MEMORY

■ PROGRAMMING TIME

– 8µs by Word typical for Fast Factory

Program

– Double/Quadruple Word Program option

– Enhanced Factory Program options

■ MEMORY BLOCKS

– Multiple Bank Memory Array: 4 Mbit

Banks

– Parameter Blocks (Top location)

■ SYNCHRONOUS / ASYNCHRONOUS READ

– Synchronous Burst Read mode: 66MHz

– Asynchronous/ Synchronous Page Read

mode

– Random Access: 70ns

■ DUAL OPERATIONS

– Program Erase in one Bank while Read in

others

– No delay between Read and Write

operations

Figure 1. Package

FBGA

Stacked TFBGA88 (ZA)

8 x 10mm

■ BLOCK LOCKING

– All blocks locked at Power-up

– Any combination of blocks can be locked

– WPF for Block Lock-Down

■ SECURITY

– 128-bit user programmable OTP cells

– 64-bit unique device number

■ COMMON FLASH INTERFACE (CFI)

■ 100,000 PROGRAM/ERASE CYCLES per

BLOCK

PSRAM

■ ACCESS TIME: 70ns

■ LOW STANDBY CURRENT: 110µA

■ DEEP POWER DOWN CURRENT: 10µA

December 2004

1/18

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