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M34D64-RDW6T

64 Kbit Serial I²C Bus EEPROM With Hardware Write Control on Top Quarter of Memory

STMicroelectronics 

M34D64

Figure 7. Write Mode Sequences with WC=0 (data write enabled)

WC

BYTE WRITE

ACK

ACK

ACK

ACK

DEV SEL

BYTE ADDR BYTE ADDR

DATA IN

R/W

WC

PAGE WRITE

WC (cont'd)

PAGE WRITE

(cont'd)

ACK

ACK

ACK

ACK

DEV SEL

BYTE ADDR BYTE ADDR DATA IN 1

DATA IN 2

R/W

ACK

ACK

DATA IN N

Write Operations

Following a Start condition the bus master sends

a Device Select Code with the RW bit reset to 0.

The device acknowledges this, as shown in Figure

7, and waits for two address bytes. The device re-

sponds to each address byte with an acknowledge

bit, and then waits for the data byte(s).

Writing to the memory may be inhibited if Write

Control (WC) is driven High. Any Write instruction

with Write Control (WC) driven High (during a pe-

riod of time from the Start condition until the end of

the two address bytes) will not modify the contents

of the top quarter of the memory.

Each data byte in the memory has a 16-bit (two

byte wide) address. The Most Significant Byte (Ta-

ble 3) is sent first, followed by the Least Significant

Byte (Table 4). Bits b15 to b0 form the address of

the byte in memory.

When the bus master generates a Stop condition

immediately after the Ack bit (in the “10th bit” time

slot), either at the end of a Byte Write or a Page

AI01106C

Write, the internal memory Write cycle is triggered.

A Stop condition at any other time slot does not

trigger the internal Write cycle.

During the internal Write cycle, Serial Data (SDA)

is disabled internally, and the device does not re-

spond to any requests.

Byte Write

After the Device Select code and the address

bytes, the bus master sends one data byte. If the

addressed location is Write-protected (top quarter

of the memory), by Write Control (WC) being driv-

en High, the location is not modified. The bus mas-

ter terminates the transfer by generating a Stop

condition, as shown in Figure 7.

Page Write

The Page Write mode allows up to 32 bytes to be

written in a single Write cycle, provided that they

are all located in the same ’row’ in the memory:

that is, the most significant memory address bits

(b12-b5) are the same. If more bytes are sent than

will fit up to the end of the row, a condition known

as ‘roll-over’ occurs. This should be avoided, as

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