M34C02-RMM1 Ver la hoja de datos (PDF) - STMicroelectronics
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M34C02-RMM1 Datasheet PDF : 26 Pages
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M34C02
SIGNAL DESCRIPTION
Serial Clock (SCL)
This input signal is used to strobe all data in and
out of the device. In applications where this signal
is used by slave devices to synchronize the bus to
a slower clock, the bus master must have an open
drain output, and a pull-up resistor can be con-
nected from Serial Clock (SCL) to VCC. (Figure 4
indicates how the value of the pull-up resistor can
be calculated). In most applications, though, this
method of synchronization is not employed, and
so the pull-up resistor is not necessary, provided
that the bus master has a push-pull (rather than
open drain) output.
Serial Data (SDA)
This bi-directional signal is used to transfer data in
or out of the device. It is an open drain output that
may be wire-OR’ed with other open drain or open
collector signals on the bus. A pull up resistor must
be connected from Serial Data (SDA) to VCC. (Fig-
ure 4 indicates how the value of the pull-up resistor
can be calculated).
Chip Enable (E0, E1, E2)
These input signals are used to set the value that
is to be looked for on the three least significant bits
(b3, b2, b1) of the 7-bit Device Select Code. These
inputs must be tied to VCC or VSS to establish the
Device Select Code.
Write Control (WC)
This input signal is provided for protecting the con-
tents of the whole memory from inadvertent write
operations. Write Control (WC) is used to enable
(when driven Low) or disable (when driven High)
write instructions to the entire memory area or to
the Protection Register.
When Write Control (WC) is tied Low or left
unconnected, the write protection of the first half of
the memory is determined by the status of the
Protection Register.
Figure 4. Maximum RL Value versus Bus Capacitance (CBUS) for an I2C Bus
VCC
20
16
12
8
4
0
10
fc = 100kHz
fc = 400kHz
100
CBUS (pF)
RL
SDA
MASTER
SCL
RL
CBUS
1000
CBUS
AI01665
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