M2V28S20TP Ver la hoja de datos (PDF) - Mitsumi

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M2V28S20TP

128M Synchronous DRAM

Mitsumi 

SDRAM (Rev. 1.0E)

Jun. '99

MITSUBISHI LSIs

M2V28S20TP-6,-7,-8

M2V28S30TP-6,-7,-7L,-8,-8L

M2V28S40TP-7,-7L,-8,-8L

128M Synchronous DRAM

(4-BANK x 8,388,608-WORD x 4-BIT)

(4-BANK x 4,194,304-WORD x 8-BIT)

(4-BANK x 2,097,152-WORD x 16-BIT)

ABSOLUTE MAXIMUM RATINGS

Symbol

Vdd

VddQ

VI

VO

IO

Pd

Topr

Tstg

Parameter

Supply Voltage

Supply Voltage for Output

Input Voltage

Output Voltage

Output Current

Power Dissipation

Operating Temperature

Storage Temperature

Conditions

with respect to Vss

with respect to VssQ

with respect to Vss

with respect to VssQ

Ta = 25ºC

Ratings

-0.5 - 4.6

-0.5 - 4.6

-0.5 - 4.6

-0.5 - 4.6

50

1000

0 - 70

-65 - 150

Unit

V

V

V

V

mA

mW

ºC

ºC

RECOMMENDED OPERATING CONDITIONS

(Ta=0 – 70ºC, unless otherwise noted )

Symbol

Parameter

Vdd

Vss

VddQ

VssQ

VIH*1

VIL*2

Supply Voltage

Supply Voltage

Supply Voltage for Output

Supply Voltage for Output

High-level Input Voltage all inputs

Low-level Input Voltage all inputs

NOTES)

1. VIH(max)=5.5V for pulse width less than 10ns.

2. VIL(min)=-1.0V for pulse width less than 10ns.

Min.

3.0

0

3.0

0

2.0

-0.3

Limits

Typ.

3.3

0

3.3

0

Unit

Max.

3.6

V

0

V

3.6

V

0

V

VddQ +0.3

V

0.8

V

CAPACITANCE

(Ta=0 – 70ºC, Vdd= VddQ= 3.3 ± 0.3V, Vss= VssQ= 0V, unless otherwise noted )

Symbol

CI(A)

CI(C)

CI(K)

CI/O

Parameter

Input Capacitance, address pin

Input Capacitance, contorl pin

Input Capacitance, CLK pin

Input Capacitance, I/O pin

Limits (max.)

Test Condition Limits (min.)

Unit

-6 (PC133) -7/-8(PC100)

2.5

@ 1MHz

1.4V bias

2.5

200mV swing

Vcc=3.3V

2.5

4.0

3.8

5.0

pF

3.8

5.0

pF

3.5

4.0

pF

6.5

6.5

pF

MITSUBISHI ELECTRIC

29

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