M295V400B-120M1R Ver la hoja de datos (PDF) - STMicroelectronics

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M295V400B-120M1R

4 Mbit (512Kb x8 or 256Kb x16, Boot Block)Single Supply Flash Memory

STMicroelectronics 

M29F400T, M29F400B

Figure 3. Memory Map and Block Address Table (x8)

7FFFFh

7C000h

7BFFFh

7A000h

79FFFh

78000h

77FFFh

70000h

6FFFFh

60000h

5FFFFh

50000h

4FFFFh

40000h

3FFFFh

30000h

2FFFFh

20000h

1FFFFh

10000h

0FFFFh

00000h

M29F400T

16K BOOT BLOCK

8K PARAMETER BLOCK

8K PARAMETER BLOCK

32K MAIN BLOCK

64K MAIN BLOCK

64K MAIN BLOCK

64K MAIN BLOCK

64K MAIN BLOCK

64K MAIN BLOCK

64K MAIN BLOCK

64K MAIN BLOCK

7FFFFh

70000h

6FFFFh

60000h

5FFFFh

50000h

4FFFFh

40000h

3FFFFh

30000h

2FFFFh

20000h

1FFFFh

10000h

0FFFFh

08000h

07FFFh

06000h

05FFFh

04000h

03FFFh

00000h

M29F400B

64K MAIN BLOCK

64K MAIN BLOCK

64K MAIN BLOCK

64K MAIN BLOCK

64K MAIN BLOCK

64K MAIN BLOCK

64K MAIN BLOCK

32K MAIN BLOCK

8K PARAMETER BLOCK

8K PARAMETER BLOCK

16K BOOT BLOCK

AI01730

Command Interface

Instructions, made up of commands written in cy-

cles, can be given to the Program/Erase Controller

through a Command Interface (C.I.). For added

data protection, program or erase execution starts

after 4 or 6 cycles. The first,second, fourth and fifth

cycles are used to input Coded cycles to the C.I.

This Coded sequence is the same for all Pro-

gram/Erase Controller instructions. The ’Com-

mand’ itself and its confirmation, when applicable,

are given on the third, fourth or sixth cycles. Any

incorrect command or any improper command se-

quence will reset the device to Read Array mode.

Instructions

Seven instructions are defined to perform Read

Array, Auto Select (to read the Electronic Signature

or Block Protection Status), Program, Block Erase,

Chip Erase, Erase Suspend and Erase Resume.

The internal P/E.C. automatically handles all tim-

ing and verification of the Program and Erase

operations. The Status Register Data Polling, Tog-

gle, Error bits and the RB output may be read at

4/34

any time, during programming or erase, to monitor

the progress of the operation.

Instructions are composed of up to six cycles. The

first two cycles input a Coded sequence to the

Command Interface which is common to all instruc-

tions (see Table 8). The third cycle inputs the

instruction set-up command. Subsequent cycles

output the addressed data, Electronic Signature or

Block Protection Status for Read operations. In

order to give additional data protection, the instruc-

tions for Program and Block or Chip Erase require

further command inputs. For a Program instruction,

the fourth command cycle inputs the address and

data to be programmed. For an Erase instruction

(Block or Chip), the fourth and fifth cycles input a

further Coded sequence before the Erase confirm

command on the sixth cycle. Erasure of a memory

block may be suspended, in order to read data from

another block or to program data in another block,

and then resumed.

When power is first applied or if VCC falls below

VLKO, the command interface is reset to Read

Array.

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