M29F400(1999) Ver la hoja de datos (PDF) - STMicroelectronics
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Fabricante
M29F400
(Rev.:1999)
(Rev.:1999)
STMicroelectronics
M29F400 Datasheet PDF : 22 Pages
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M29F400BT, M29F400BB
Table 3A. M29F400BT Block Addresses
Size
Address Range
(Kbytes)
(x8)
Address Range
(x16)
16
7C000h-7FFFFh
3E000h-3FFFFh
8
7A000h-7BFFFh
3D000h-3DFFFh
8
78000h-79FFF h
3C000h-3CFFFh
32
70000h-77FFF h
38000h-3BFFFh
64
60000h-6FFFFh
30000h-37FFFh
64
50000h-5FFFFh
28000h-2FFFFh
64
40000h-4FFFFh
20000h-27FFFh
64
30000h-3FFFFh
18000h-1FFFFh
64
20000h-2FFFFh
10000h-17FFFh
64
10000h-1FFFFh
08000h-0FFFFh
64
00000h-0FFFFh
00000h-07FFFh
Table 3B. M29F400BB Block Addresses
Size
Address Range
(Kbytes)
(x8)
Address Range
(x16)
64
70000h-7FFFFh
38000h-3FFFFh
64
60000h-6FFFFh
30000h-37FFFh
64
50000h-5FFFFh
28000h-2FFFFh
64
40000h-4FFFFh
20000h-27FFFh
64
30000h-3FFFFh
18000h-1FFFFh
64
20000h-2FFFFh
10000h-17FFFh
64
10000h-1FFFFh
08000h-0FFFFh
32
08000h-0FFFFh
04000h-07FFFh
8
06000h-07FFFh
03000h-03FFFh
8
04000h-05FFFh
02000h-02FFFh
16
00000h-03FFFh
00000h-01FFFh
Reset/Block Temporary Unprotect (RP). The Re-
set/Block Temporary Unprotect pin can be used to
apply a Hardware Reset to the memory or to tem-
porarily unprotect all Blocks that have been pro-
tected.
A Hardware Reset is achieved by holding Reset/
Block Temporary Unprotect Low, VIL, for at least
tPLPX. After Reset/Block Temporary Unprotect
goes High, VIH, the memory will be ready for Bus
Read and Bus Write operations after tPHEL or
tRHEL, whichever occurs last. See the Ready/Busy
Output section, Table 14 and Figure 10, Reset/
Temporary Unprotect AC Characteristics for more
details.
Holding RP at VID will temporarily unprotect the
protected Blocks in the memory. Program and
Erase operations on all blocks will be possible.
The transition from VIH to VID must be slower than
tPHPHH.
Ready/Busy Output (RB). The Ready/Busy pin
is an open-drain output that can be used to identify
when the memory array can be read. Ready/Busy
is high-impedance during Read mode, Auto Select
mode and Erase Suspend mode.
After a Hardware Reset, Bus Read and Bus Write
operations cannot begin until Ready/Busy be-
comes high-impedance. See Table 14 and Figure
10, Reset/Temporary Unprotect AC Characteris-
tics.
During Program or Erase operations Ready/Busy
is Low, VOL. Ready/Busy will remain Low during
Read/Reset commands or Hardware Resets until
the memory is ready to enter Read mode.
The use of an open-drain output allows the Ready/
Busy pins from several memories to be connected
to a single pull-up resistor. A Low will then indicate
that one, or more, of the memories is busy.
Byte/Word Organization Select (BYTE). The Byte/
Word Organization Select pin is used to switch be-
tween the 8-bit and 16-bit Bus modes of the mem-
ory. When Byte/Word Organization Select is Low,
VIL, the memory is in 8-bit mode, when it is High,
VIH, the memory is in 16-bit mode.
VCC Supply Voltage. The VCC Supply Voltage
supplies the power for all operations (Read, Pro-
gram, Erase etc.).
The Command Interface is disabled when the VCC
Supply Voltage is less than the Lockout Voltage,
VLKO. This prevents Bus Write operations from ac-
cidentally damaging the data during power up,
power down and power surges. If the Program/
Erase Controller is programming or erasing during
this time then the operation aborts and the memo-
ry contents being altered will be invalid.
A 0.1µF capacitor should be connected between
the VCC Supply Voltage pin and the VSS Ground
pin to decouple the current surges from the power
supply. The PCB track widths must be sufficient to
carry the currents required during program and
erase operations, ICC4.
Vss Ground. The VSS Ground is the reference
for all voltage measurements.
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