M27C516 Ver la hoja de datos (PDF) - STMicroelectronics
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M27C516 Datasheet PDF : 13 Pages
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M27C516
Figure 6. Programming and Verify Modes AC Waveforms
A0-A14
Q0-Q15
VPP
VCC
E
P
G
tAVPL
DATA IN
tQVPL
VALID
tPHQX
DATA OUT
tVPHPL
tGLQV
tVCHPL
tELPL
tPLPH
tQXGL
PROGRAM
VERIFY
tGHQZ
tGHAX
AI00936
Figure 7. Programming Flowchart
VCC = 6.25V, VPP = 12.75V
n=0
NO
++n
= 25
YES
P = 100µs Pulse
NO
VERIFY
YES
++ Addr
FAIL
Last NO
Addr
YES
CHECK ALL WORDS
1st: VCC = 6V
2nd: VCC = 4.2V
AI00707C
8/13
PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows to pro-
gram the whole array with a guaranteed margin, in
a typical time of 3 seconds. Programming with
PRESTO II involves the application of a sequence
of 100µs program pulses to each byte until a cor-
rect verify occurs (see Figure 7). During program-
ming and verify operation, a MARGIN MODE
circuit is automatically activated in order to guar-
antee that each cell is programmed with enough
margin. No overprogram pulse is applied since the
verify in MARGIN MODE provides necessary mar-
gin to each programmed cell.
Program Inhibit
Programming of multiple M27C516s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including G of the parallel
M27C516 may be common. A TTL low level pulse
applied to a M27C516's P input, with E low and
VPP at 12.75V, will program that M27C516. A high
level E input inhibits the other M27C516s from be-
ing programmed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with E
and G at VIL, P at VIH, VPP at 12.75V and VCC at
6.25V.
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