M27C516 Ver la hoja de datos (PDF) - STMicroelectronics
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M27C516 Datasheet PDF : 13 Pages
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M27C516
Table 5. AC Measurement Conditions
Input Rise and Fall Times
Input Pulse Voltages
Input and Output Timing Ref. Voltages
High Speed
≤ 10ns
0 to 3V
1.5V
Standard
≤ 20ns
0.4V to 2.4V
0.8V and 2V
Figure 3. AC Testing Input Output Waveform
Figure 4. AC Testing Load Circuit
1.3V
1N914
DEVICE
UNDER
TEST
3.3kΩ
OUT
CL = 30pF or 60pF or 100pF
CL includes JIG capacitance
AI02024B
Table 6. Capacitance (1) (TA = 25 °C, f = 1 MHz)
Symbol
Parameter
Test Condition
Min
CIN
Input Capacitance
VIN = 0V
COUT Output Capacitance
VOUT = 0V
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP.
2. This parameter is sampled only and not tested 100%.
Max
6
12
Unit
pF
pF
Standby Mode
The M27C516 has a standby mode which reduces
the supply current from 30mA to 100µA. The
M27C516 is placed in the standby mode by apply-
ing a CMOS high signal to the E input. When in the
standby mode, the outputs are in a high imped-
ance state, independent of the G input.
Two Line Output Control
Because OTP EPROMs are usually used in larger
memory arrays, the product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
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