AS8F512K32 Ver la hoja de datos (PDF) - Austin Semiconductor
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AS8F512K32 Datasheet PDF : 23 Pages
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Austin Semiconductor, Inc.
FLASH
AS8F512K32
Command Sequence
Reset
Read
Algorithm Selection
Program
Chip Erase
Sector Erase
Sector Erase Supend
Sector Erase Resume
Command Denfinitions Table
Bus Cycles
First
Second
Third
Fourth
Fifth
Sixth
Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data
1 XXXX F0
4 5555 AA 2AAA 55 5555 F0 RA RD
4 5555 AA 2AAA 55 5555 90 RA RD
4 5555 AA 2AAA 55 5555 A0 PA PD
6 5555 AA 2AAA 55 5555 80 5555 AA 2AAA 55 5555 10
6 5555 AA 2AAA 55 5555 80 5555 AA 2AAA 55 SA 30
XXXX B0 Erase-supend vaild during sector-erase operation
XXXX 30 Erase-resume vaild only after erase supend
LEGEND:
RA = Address of the location to be read
PA = Address of the location to be programed
SA = Address of the sector to erased
Addresses A18, A17, A16 select 1 of 8 sectors
RD = Data to be read at selected address location
PD = Data to be programmed at selected address location
*Address pin A18, A17, A16, A15 = V or V for al bus cycle addresses except for program address (PA),
IL
IH
sector address(SA), and read address (RA).
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55°C < TA < 125°C; VCC = 5V +5%/-10%)
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NOTES:
1. Icc active while Embedded Program or Embedded Erase Algorithm is in progress.
2. Not 100% tested.
3. Applies to 32 bit operations.
AS8F512K32
Rev. 5.2 09/07
10
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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