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24512

512-Kbit serial I²C bus EEPROM

STMicroelectronics 

Description

1

Description

M24512-R, M24512-W, M24512-DR

The M24512-x devices are I2C-compatible electrically erasable programmable memories

(EEPROM). They are organized as 64 Kb × 8 bits.

The M24512-x can decode the type identifier code (1010) in accordance with the I2C bus

definition. The M24512-DR also decodes the type identifier code (1011) when accessing the

identification page.

The M24512-DR offers an additional Identification Page (128 bytes) which can be written

and (later) permanently locked in Read Only mode. This Identification Page can be used for

example in the assembly line, to store some application identification parameters.

The device behaves as a slave in the I2C protocol, with all memory operations synchronized

by the serial clock. Read and Write operations are initiated by a Start condition, generated

by the bus master. The Start condition is followed by a device select code and Read/Write

bit (RW) terminated by an acknowledge bit.

When writing data to the memory, the device inserts an acknowledge bit during the 9th bit

time, following the bus master’s 8-bit transmission. When data is read by the bus master, the

bus master acknowledges the receipt of the data byte in the same way. Data transfers are

terminated by a Stop condition after an Ack for Write, and after a NoAck for Read.

Figure 1. Logic diagram

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Table 1. Signal names

Signal name

E0, E1, E2

SDA

SCL

WC

VCC

VSS

Function

Chip Enable

Serial Data

Serial Clock

Write Control

Supply voltage

Ground

!)G

Direction

Inputs

I/O

Input

Input

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Doc ID 16459 Rev 19

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