M27C320 Ver la hoja de datos (PDF) - STMicroelectronics

Número de pieza

componentes Descripción

Fabricante

M27C320

32 Mbit (4Mb x8 or 2Mb x16) OTP EPROM

STMicroelectronics 

M27C320

Figure 9. Programming and Verify Modes AC Waveforms

A0-A20

Q0-Q15

VCC

GVPP

E

tAVEL

DATA IN

tQVEL

VALID

tEHQX

DATA OUT

tEHAX

tEHQZ

tVCHEL

tEHVPX

tELQV

tVPHEL

tVPLEL

tELEH

PROGRAM

VERIFY

AI02205

Note: BYTE = VIH; GVPP High level = 12V.

Figure 10. Programming Flowchart

VCC = 6.25V, VPP = 12V

SET MARGIN MODE

n=0

NO

++n

= 25

YES

E = 50µs Pulse

NO

VERIFY

YES

++ Addr

FAIL

Last NO

Addr

YES

RESET MARGIN MODE

CHECK ALL WORDS

BYTE = VIH

1st: VCC = 6V

2nd: VCC = 4.2V

AI02220

PRESTO III Programming Algorithm

The PRESTO III Programming Algorithm allows

the whole array to be programed with a guaran-

teed margin in a typical time of 100 seconds. Pro-

gramming with PRESTO III consists of applying a

sequence of 50µs program pulses to each word

until a correct verify occurs (see Figure 10). During

programing and verify operation a MARGIN

MODE circuit must be activated to guarantee that

each cell is programed with enough margin. No

overprogram pulse is applied since the verify in

MARGIN MODE provides the necessary margin to

each programmed cell.

Program Inhibit

Programming of multiple M27C320s in parallel

with different data is also easily accomplished. Ex-

cept for E, all like inputs including G of the parallel

M27C320 may be common. A TTL low level pulse

applied to a M27C320's E input and VPP at 12V,

will program that M27C320. A high level E input in-

hibits the other M27C320s from being pro-

grammed.

Program Verify

A verify (read) should be performed on the pro-

grammed bits to determine that they were correct-

ly programmed. The verify is accomplished with G

at VIL. Data should be verified with tELQV after the

falling edge of E.

10/15

Share Link: