LX8587 Ver la hoja de datos (PDF) - Microsemi Corporation
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LX8587 Datasheet PDF : 11 Pages
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LX8587x-xx
®
3A Low Dropout Positive Regulators
TM
PRODUCTION DATA SHEET
APPLICATION NOTES (CONTINUED)
OVERLOAD RECOVERY (continued)
voltage across the regulator at the time the short circuit is
removed from the output. If this limited current is not sufficient
to develop the designed voltage across the output resistor, the
voltage will stabilize at some lower value, and will never reach
the designed value. Under these circumstances, it may be
necessary to cycle the input voltage down to zero in order to
make the regulator output voltage return to regulation.
RIPPLE REJECTION
Ripple rejection can be improved by connecting a capacitor
between the ADJ pin and ground. The value of the capacitor
should be chosen so that the impedance of the capacitor is equal
in magnitude to the resistance of R1 at the ripple frequency. The
capacitor value can be determined by using this equation:
C
=
1
(6.28× FR
×
R1)
where:
C ≡ the value of the capacitor in Farads; select
an equal or larger standard value.
FR ≡ the ripple frequency in Hz
R1 ≡ the value of resistor R1 in ohms
At a Ripple frequency of 120Hz, with R1= 100Ω:
C
=
1
(6.28 ×120Hz
×100Ω)
=
13.3μF
The closest equal or larger standard value should be used, in
this case, 15µF. When an ADJ pin bypass capacitor is used,
output ripple amplitude will be essentially independent of the
output voltage. If an ADJ pin bypass capacitor is not used, output
ripple will be proportional to the ratio of the output voltage to the
reference voltage:
M = VOUT
VREF
where: M ≡ a multiplier for the ripple seen when the
ADJ pin is optimally bypassed.
VREF≡ 1.25V
For example, if VOUT = 2.5V the output ripple will be:
M = 2.5V = 2
1.25V
Output ripple will be twice as bad as it would be if the ADJ
pin were to be bypassed to ground with a properly selected
capacitor.
OUTPUT VOLTAGE
The LX857/87A ICs develop a 1.25V reference voltage
between the output and the adjust terminal (See Figure 2). By
placing a resistor, R1, between these two terminals, a constant
current is caused to flow through R1 and down through R2 to set
the overall output voltage. Normally this current is the specified
minimum load current of 10mA. Because IADJ is very small and
constant when compared with the current through R1, it
represents a small error and can usually be ignored.
IN
VIN
ADJ
IADJ
50µA
OUT
VREF
VOUT
= VREF ⎜⎜⎝⎛1+
R2
R1
⎟⎞
⎠
+
I
ADJ
R2
VOUT
R1
R2
FIGURE 2 - BASIC ADJUSTABLE REGULATOR
LOAD REGULATION
Because the LX8587/87A regulators are three-terminal
devices, it is not possible to provide true remote load sensing.
Load regulation will be limited by the resistance of the wire
connecting the regulator to the load. The data sheet specification
for load regulation is measured at the bottom of the package.
Negative side sensing is a true Kelvin connection, with the
bottom of the output divider returned to the negative side of the
load. Although it may not be immediately obvious, best load
regulation is obtained when the top of the resistor divider, (R1), is
connected directly to the case of the regulator, not to the load.
This is illustrated in Figure 3. If R1 were connected to the load,
the effective resistance between the regulator and the load would
be:
RPeff
=
RP
×
⎜⎛
⎝
R2 + R1
R1
⎟⎞
⎠
where: RP ≡ Actual parasitic line resistance.
When the circuit is connected as shown in Figure 3, the
parasitic resistance appears as its actual value, rather than the
higher RPeff.
RP Parasitic Line
Resistance
IN
OUT
VIN
ADJ
Connect R1 to
Case of Regulator
R1
Connect R2 to
RL
Load
R2
FIGURE 3 - CONNECTIONS FOR BEST LOAD REGULATION
Copyright © 2000
Rev. 2.0a, 2005-10-25
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 6
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