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LX8385-00ID Ver la hoja de datos (PDF) - Microsemi Corporation

Número de pieza
componentes Descripción
Fabricante
LX8385-00ID
Microsemi
Microsemi Corporation Microsemi
LX8385-00ID Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10

A MICROSEMI COMPANY
LX8385x-xx
3A Low Dropout Positive Regulators
PRODUCTION DATA SHEET
       
Power Dissipation....................................................................................Internally Limited
Input Voltage .................................................................................................................10V
Input to Output Voltage Differential..............................................................................10V
Operating Junction Temperature
Plastic (DT, DD, P Packages)................................................................................ 150°C
Storage Temperature Range .......................................................................-65°C to 150 °C
Lead Temperature (Soldering, 10 Seconds)............................................................... 300°C
Note 1: Exceeding these ratings could cause damage to the device. All voltages are with respect to
Ground. Currents are positive into, negative out of specified terminal.
 
DD Plastic TO-263 3-Pin
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
THERMAL RESISTANCE-JUNCTION TO TAB, θJT
P Plastic TO-220 3-Pin
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
THERMAL RESISTANCE-JUNCTION TO TAB, θJT
DT Plastic TO-252 3-Pin
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
THERMAL RESISTANCE-JUNCTION TO TAB, θJT
60°C/W
2.7°C/W
60°C/W
2.7°C/W
60°C/W
2.7°C/W
Junction Temperature Calculation: TJ = TA + (PD x θJT).
The θJA & θJT numbers are guidelines for the thermal performance of the device/pc-board
system. All of the above assume no ambient airflow.
  
V IN
  
TAB is VOUT
3
V IN
2
VOUT
ADJ /
1
GND*
DD PACKAGE (3-PIN)
(Top View)
TAB is VOUT
3
V IN
2
VOUT
ADJ/
1
GND*
DT PACKAGE (3-PIN)
(Top View)
TAB is VOUT
3
2
1
P PACKAGE (3-PIN)
(Top View)
V IN
VOUT
ADJ /
GND*
*Pin 1 is GND for fixed voltage versions
Bias Circuit
T herm al
Lim it Circuit
Bandgap
Circuit
Control
Circuit
ADJ or
GND*
*Pin 1 is GND for fixed voltage versions
O u tp u t
Circuit
SOA
Protection
Circuit
Current
Lim it Circuit
V OUT
Copyright © 2000
Rev. 2.0a, 2001-03-15
Microsemi
Linfinity Microelectronics Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 2

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