LTM4606V(RevB) Ver la hoja de datos (PDF) - Linear Technology

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LTM4606V
(Rev.:RevB)

Ultralow EMI 28VIN, 6A DC/DC µModule Regulator

Linear Technology 

LTM4606

Pin Functions

VIN (Bank 1): Power Input Pins. Apply input voltage be-

tween these pins and PGND pins. Recommend placing

input decoupling capacitance directly between VIN pins

and PGND pins.

VOUT (Bank 3): Power Output Pins. Apply output load

between these pins and PGND pins. Recommend placing

output decoupling capacitance directly between these pins

and PGND pins (see figure below).

PGND (Bank 2): Power Ground Pins for Both Input and

Output Returns.

VD (Pins B7, C7): Top FET Drain Pins. Add more capacitors

between VD and ground to handle the input RMS current

and reduce the input ripple further.

DRVCC (Pins C10, E11, E12): These pins normally con-

nect to INTVCC for powering the internal MOSFET drivers.

They can be biased up to 6V from an external supply with

about 50mA capability, or an external circuit as shown in

Figure 18. This improves efficiency at the higher input

voltages by reducing power dissipation in the modules.

INTVCC (Pin A7): This pin is for additional decoupling of

the 5V internal regulator.

PLLIN (Pin A8): External Clock Synchronization Input to

the Phase Detector. This pin is internally terminated to

SGND with a 50k resistor. Apply a clock with high level

above 2V and below INTVCC. See the Applications Infor-

mation section.

FCB (Pin M12): Forced Continuous Input. Connect this pin

to SGND to force continuous synchronization operation at

low load, to INTVCC to enable discontinuous mode opera-

tion at low load or to a resistive divider from a secondary

output when using a secondary winding.

TRACK/SS (Pin A9): Output Voltage Tracking and Soft-Start

Pin. When the module is configured as a master output,

then a soft-start capacitor is placed on this pin to ground

to control the master ramp rate. A soft-start capacitor can

be used for soft-start turn-on as a standalone regulator.

Slave operation is performed by putting a resistor divider

from the master output to ground, and connecting the

center point of the divider to this pin. See the Applications

Information section.

MPGM (Pins A12, B11): Programmable Margining Input.

A resistor from these pins to ground sets a current that

is equal to 1.18V/R. This current multiplied by 10kW will

equal a value in millivolts that is a percentage of the 0.6V

reference voltage. See the Applications Information section.

To parallel LTM4606s, each requires an individual MPGM

resistor. Do not tie MPGM pins together.

fSET (Pin B12): Frequency set internally to 800kHz in

continuous conducting mode at light load. An external

resistor can be placed from this pin to ground to increase

frequency. This pin can be decoupled with a 1000pF

capacitor. See the Applications Information section for

frequency adjustment.

VFB (Pin F12): The Negative Input of the Error Amplifier.

Internally, this pin is connected to VOUT with a 60.4k preci-

sion resistor. Different output voltages can be programmed

with an additional resistor between the VFB and SGND pins.

See the Applications Information section.

MARG0 (Pin C12): LSB Logic Input for the Margining

Function. Together with the MARG1 pin, the MARG0 pin

will determine if a margin high, margin low, or no margin

state is applied. The pin has an internal pulldown resistor

of 50k. See the Applications Information section.

MARG1 (Pins C11, D12): MSB Logic Input for the Margin-

ing Function. Together with the MARG0 pin, the MARG1

pins will determine if a margin high, margin low, or no

margin state is applied. The pins have an internal pull-down

resistor of 50k. See the Applications Information section.

SGND (Pins D9, H12): Signal Ground Pins. These pins

connect to PGND at output capacitor point.

COMP (Pins A11, D11): Current Control Threshold and

Error Amplifier Compensation Point. The current com-

parator threshold increases with this control voltage. The

voltage ranges from 0V to 2.4V with 0.7V corresponding

to zero sense voltage (zero current).

PGOOD (Pin G12): Output Voltage Power Good Indicator.

Open-drain logic output that is pulled to ground when the

output voltage is not within ±10% of the regulation point,

after a 25µs power bad mask timer expires.

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