LTM4601HV Ver la hoja de datos (PDF) - Linear Technology

Número de pieza

componentes Descripción

Fabricante

LTM4601HV

12A 28VIN DC/DC µModule Regulator with PLL, Output Tracking and Margining

Linear Technology 

LTM4601HV

PIN FUNCTIONS (See Package Description for Pin Assignment)

VIN (Bank 1): Power Input Pins. Apply input voltage be-

tween these pins and PGND pins. Recommend placing

input decoupling capacitance directly between VIN pins

and PGND pins.

VOUT (Bank 3): Power Output Pins. Apply output load

between these pins and PGND pins. Recommend placing

output decoupling capacitance directly between these pins

and PGND pins. See Figure 17.

PGND (Bank 2): Power ground pins for both input and

output returns.

VOSNS– (Pin M12): (–) Input to the Remote Sense Ampli-

fier. This pin connects to the ground remote sense point.

The remote sense amplifier is used for VOUT ≤3.3V. Tie to

INTVCC if not used.

VOSNS+ (Pin J12): (+) Input to the Remote Sense Ampli-

fier. This pin connects to the output remote sense point.

The remote sense amplifier is used for VOUT ≤3.3V. Tie to

ground if not used.

DIFFVOUT (Pin K12): Output of the Remote Sense Ampli-

fier. This pin connects to the VOUT_LCL pin. Leave floating

if remote sense amplifier is not used.

DRVCC (Pin E12): This pin normally connects to INTVCC

for powering the internal MOSFET drivers. This pin can be

biased up to 6V from an external supply with about 50mA

capability, or an external circuit as shown in Figure 18.

This improves efficiency at the higher input voltages by

reducing power dissipation in the module.

INTVCC (Pin A7): This pin is for additional decoupling of

the 5V internal regulator.

PLLIN (Pin A8): External Clock Synchronization Input

to the Phase Detector. This pin is internally terminated

to SGND with a 50k resistor. Apply a clock with a high

level above 2V and below INTVCC. See the Applications

Information section.

TRACK/SS (Pin A9): Output Voltage Tracking and Soft-

Start Pin. When the module is configured as a master

output, then a soft-start capacitor is placed on this pin

to ground to control the master ramp rate. A soft-start

capacitor can be used for soft-start turn on of a stand

alone regulator. Slave operation is performed by putting

a resistor divider from the master output to ground, and

connecting the center point of the divider to this pin. See

the Applications Information section.

MPGM (Pin A12): Programmable Margining Input. A re-

sistor from this pin to ground sets a current that is equal

to 1.18V/R. This current multiplied by 10kΩ will equal a

value in millivolts that is a percentage of the 0.6V refer-

ence voltage. See Applications Information. To parallel

LTM4601HVs, each requires an individual MPGM resistor.

Do not tie MPGM pins together.

fSET (Pin B12): Frequency Set Internally to 850kHz. An

external resistor can be placed from this pin to ground

to increase frequency. See the Applications Information

section for frequency adjustment.

VFB (Pin F12): The Negative Input of the Error Amplifier.

Internally, this pin is connected to VOUT_LCL pin with a

60.4k precision resistor. Different output voltages can be

programmed with an additional resistor between VFB and

SGND pins. See the Applications Information section.

MARG0 (Pin C12): This pin is the LSB logic input for the

margining function. Together with the MARG1 pin it will

determine if margin high, margin low or no margin state

is applied. The pin has an internal pull-down resistor of

50k. See the Applications Information section.

MARG1 (Pin D12): This pin is the MSB logic input for the

margining function. Together with the MARG0 pin it will

determine if margin high, margin low or no margin state

is applied. The pin has an internal pull-down resistor of

50k. See the Applications Information section.

4601hvfb

7

Share Link: