LTC4219 Ver la hoja de datos (PDF) - Linear Technology

Número de pieza

componentes Descripción

Fabricante

LTC4219

5A Integrated Hot Swap Controller

Linear Technology 

LTC4219

Electrical Characteristics The l denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. VDD = 12V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN TYP MAX UNITS

Outputs

VINTVCC

INTVCC Output Voltage

VDD = 5V, 15V

ILOAD = 0mA, –10mA

l 2.8

3.1

3.2

V

VOL

PG, FLT Output Low Voltage

ISINK = 2mA

l

0.4

0.8

V

IOH

PG, FLT Input Leakage Current

VPIN = 30V

l

0

±10

µA

VTIMER(H)

TIMER High Threshold

VTIMER Rising

l 1.2 1.235 1.28

V

VTIMER(L)

TIMER Low Threshold

VTIMER Falling

l 0.1

0.21

0.3

V

ITIMER(UP)

TIMER Pull-Up Current

VTIMER = 0V

l –80 –100 –120

µA

ITIMER(DN)

TIMER Pull-Down Current

VTIMER = 1.2V

l 1.4

2

2.6

µA

ITIMER(RATIO)

TIMER Current Ratio ITIMER(DN)/ITIMER(UP)

l 1.6

2

2.7

%

AIMON

IMON Current Gain

IOUT = 2.5A

l 18.5

20

21.5

µA/A

BWIMON

IMON Bandwidth

250

kHz

IOFF(IMON)

IMON Offset Current

IOUT = 150mA

l

0

±4.5

µA

IGATE(UP)

Gate Pull-Up Current

Gate Drive On, VGATE = VOUT = 12V

l –19

–24

–29

µA

IGATE(DN)

Gate Pull-Down Current

Gate Drive Off, VGATE = 18V, VOUT = 12V l 190

250

400

µA

IGATE(FST)

Gate Fast Pull-Down Current

Fast Turn Off, VGATE = 18V, VOUT = 12V

140

mA

AC Characteristics

tPHL(GATE)

Input High (EN1, EN2) to Gate Low

Propagation Delay

VGATE < 16.5V Falling

l

8

10

µs

tPHL(ILIM)

Short Circuit to Gate Low

VFB = 0, Step ISENSE to 6A,

l

VGATE < 15V Falling

1

5

µs

tD(ON)

Turn-On Delay

Step VEN1 and VEN2 to 0V, VGATE > 13V l 50

100

150

ms

tD(FAULT)

EN1 High to Clear Fault Latch Delay

5

µs

tD(CB)

Circuit Breaker Filter Delay Time (Internal)

VFB = 0V, Step ISENSE to 3A

l 1.5

2

2.7

ms

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All currents into pins are positive, all voltages are referenced to

GND unless otherwise specified.

Note 3: An internal clamp limits the GATE pin to a maximum of 6.5V

above OUT. Driving this pin to voltages beyond the clamp may damage the

device.

Note 4: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 125°C when overtemperature protection is active.

Continuous operation above the specified maximum operating junction

temperature may impair device reliability.

Note 5: TJ is calculated from the ambient temperature, TA, and power

dissipation, PD, according to the formula:

TJ = TA + (PD • 43°C/W)

4219fd

4

For more information www.linear.com/LTC4219

Share Link: