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Número de pieza

componentes Descripción

Fabricante

LTC4219

5A Integrated Hot Swap Controller

Linear Technology 

LTC4219

Applications Information

The typical LTC4219 application is in a high availability

system that uses a positive voltage supply to distribute

VDD + 6.15V

GATE

SLOPE = 0.3[V/ms]

power to individual cards. A complete application circuit

is shown in Figure 1. External component selection is

VDD

OUT

discussed in detail in the following sections.

Turn-On Sequence

Several conditions must be present before the internal

pass MOSFET can be turned on. First the supply VDD must

exceed its undervoltage lockout level. Next the internally

generated supply INTVCC must cross its 2.65V under-

voltage threshold. This generates a 25µs power-on-reset

pulse which clears the fault register and initializes internal

latches. Finally, the enable inputs EN1 and EN2 both must

be below the 1.15V threshold. All of these conditions must

be satisfied for the duration of 100ms to ensure that any

contact bounce during the insertion has ended.

The MOSFET is turned on by charging up the GATE with

a charge pump generated 24µA current source whose

value is adjusted by shunting a portion of the pull-up cur-

rent to ground. The charging current is controlled by the

INRUSH circuit that maintains a constant slope of GATE

voltage versus time (Figure 2). The voltage at the GATE

pin rises with a slope of 0.3[V/ms] and the supply inrush

current is set at:

IINRUSH = CL • 0.3[V/ms]

t1

t2

4219 F02

Figure 2. Supply Turn-On

This gate slope is designed to charge up a 1000µF capaci-

tor to 12V in 40ms, with an inrush current of 300mA. This

allows the inrush current to stay under the current limit

threshold (1.5A) for capacitors less than 1000µF. Included

in the Typical Performance Characteristics section is a

graph of the Safe Operating Area for the MOSFET. It is

evident from this graph that the power dissipation at 12V,

300mA for 40ms is in the safe region.

Adding the RGATE, CGATE and CCOMP network on the GATE

pin will lower the inrush current below the default value

set by the inrush circuit. The GATE is then charged with

a 24µA current source. The voltage at the GATE pin rises

with a slope equal to 24µA/CGATE and the supply inrush

current is set at:

IINRUSH

=

CL

CGATE

• 24µA

VOUT

12V

VDD

OUT

12V

Z1*

R2 R3

200k 200k

EN1

CCOMP

3.3nF

+

2A

CL

330µF

R4 10k

EN2

GATE

Q1

BSS84

LTC4219DHC-12

R1

10k

FLT

PG

ISET

RGATE

100k

CGATE

0.1µF

12V

R4

10k

PG = 10.5V

RSET

20k

TIMER

CT

0.1µF

INTVCC

C1

GND

1µF

IMON

RMON

20k

ADC

4219 F01

*TVS Z1: DIODES INC. SMAJ17A

Figure 1. 2A, 12V Card Resident Application with Auto-Retry

For more information www.linear.com/LTC4219

4219fd

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