LTC4218CGN(RevB) Ver la hoja de datos (PDF) - Linear Technology
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LTC4218CGN Datasheet PDF : 16 Pages
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LTC4218
APPLICATIONS INFORMATION
LTC4218-12 VDD
RSHUNT2
OV
UV
RSHUNT1
4218 F04
Figure 4. Adjusting LTC4218-12 Thresholds
In this same figure the OV threshold is lowered from
15.05V to 13.5V. Decreasing the OV threshold requires
adding a resistor between VDD and OV. This resistor can
be calculated as follows:
( ( ) ) RSHUNT2
=
R(IN) • VOLD
V(TH)
⎛
⎜
⎝⎜⎜
VNEW – VOV(TH)
VOLD – VNEW
⎞
⎟
⎠⎟⎟
=
18k • 15.05
1.235
⎛
⎝⎜
(13.5 – 1.235)
(15.05 – 13.5)
⎞
⎠⎟
=
1.736M
Use the equation for RSHUNT1 for increasing the OV and
FB thresholds. Likewise, use the equation for RSHUNT2 for
decreasing the UV and FB thresholds.
Design Example
Consider the following design example (Figure 5): VIN =
12V, IMAX = 7.5A. IINRUSH = 1A, CL = 330μF, VUVON = 9.88V,
VOVOFF = 15.05V, VPWRGD = 10.5V. A current limit fault
triggers an automatic restart of the power up sequence.
The selection of the sense resistor, (RS), is set by the
overcurrent threshold of 15mV:
RS = 15mV/IMAX = 15mV/7.5A = 0.002Ω
The MOSFET should be sized to handle the power dissi-
pation during the inrush charging of the output capacitor
COUT. The method used to determine the power in Q1 is
the principal:
EC = Energy in CL = Energy in Q1
Thus:
EC = ½ CV2 = ½ (330μF)(12)2 = 0.048J
RS
Q1
12V
2mΩ
Si7108DN
VOUT
12V
R1
+
6A
CL
330μF
10Ω
CT
0.1μF
C1
0.1μF
SENSE– GATE SOURCE
SENSE+
VDD
UV
LTC4218DHC-12
FLT
PG
12V
R2
10k
RGATE
1k
CGATE
0.01μF
TIMER
INTVCC
GND
IMON
R3
20k
ADC
4218 F05
Figure 5. 6A, 12V Card Resident Application
Calculate the time it takes to charge up COUT:
tCHARGUP
=
CL • VIN
IINRUSH
=
330µF •
1A
12V
=
4ms
The inrush current is set to 1A using CGATE:
CGATE
=
CL
IGATE(UP)
IINRUSH
=
330µF
24µA
1A
≅
0.01µF
The average power dissipated in the MOSFET:
PDISS = EC/tCHARGUP = 0.048J/4ms = 12W
The SOA (safe operating area) curves of candidate MOSFETs
must be evaluated to ensure that the heat capacity of the
package can stand 12W for 4ms. The SOA curves of the
Vishay Siliconix Si7108DN provide 1.5A at 10V (15W) for
100ms, satisfying the requirement.
Next, the power dissipated in the MOSFET during overcurrent
must be limited. The active current limit uses a timer to
prevent excessive energy dissipation in the MOSFET. The
worst-case power occurs when the voltage versus current
profile of the foldback current limit is at the maximum. This
occurs when the current is 6A and the voltage is one half
of 12V or (6V). See the Current Limit Sense Voltage vs
FB Voltage in the Typical Performance curves to view this
profile. In order to survive 36W, the MOSFET SOA dictates
a maximum time at this power level. The Si7108DN allows
60W for 10ms or less. Therefore, it is acceptable to set the
current limit timeout using CT to be 1.2ms:
CT = 1.2ms/12[ms/μF] = 0.1μF
4218fb
13
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