LTC4216I Ver la hoja de datos (PDF) - Linear Technology

Número de pieza

componentes Descripción

Fabricante

LTC4216I

Ultralow Voltage Hot Swap Controller

Linear Technology 

LTC4216

Applications Information

switch when the TIMER pin voltage exceeds its threshold.

The timer period for C1 to charge up to the TIMER pin

threshold, VTMR(TH) (1.253V), is given by:

tTIMER

=

1.253V •

2µ A

C1

(1)

For example, if C1 = 10nF, tTIMER = 6.2ms.

FB Glitch Filtering

The FB pin is used to monitor the output voltage of the

external MOSFET through a resistive divider. Any tran-

sients on the FB pin due to the output low spikes will

pull RESET low. To prevent RESET from generating an

unwanted system reset, the FB comparator has a glitch

filter to ride out these glitches. The filter time is 20µs for

large transients (greater than 150mV) and up to 100µs

for small transients. The relationship between glitch filter

time and the FB pin transient voltage or FB overdrive is

shown in Figure 1.

140

TA = 25°C

120

100

80

60

FB pin voltage rises above 0.6V, the FB comparator output

goes low and a new timing cycle starts. After a complete

timing cycle at time point 6, RESET is pulled high by the

external pull-up resistor, R5. The timer period given by

Equation (1) sets the power-good delay for RESET going

high. If the FB pin voltage stays above 0.6V for less than

a timing cycle at time point 4, the RESET output remains

low. Any overcurrent fault detected by the electronic cir-

cuit breaker or FAULT pin driven low externally during the

timing cycle, will also pull the TIMER pin low and RESET

output remains low.

When the device enters an undervoltage lockout condition

or the ON pin voltage drops below 0.4V, RESET is pulled

low, ignoring the FB pin voltage.

RSENSE

M1

VIN

SENSEP SENSEN

VCC

ON LOGIC

GATE

+

VOUT

R4

CLOAD

FB

R5

R3

TIMER

0.6V –+

RESET

M2

µP

RESET

40

20

0

0

40

80

120 160 200

FB OVERDRIVE (mV)

4216 F01

Figure 1. FB Comparator Glitch Filter Time vs FB Overdrive

Output Voltage Monitor

As shown in Figure 2, the output voltage is monitored

through a resistive divider, R3 and R4, connected at the

FB pin, and a FB comparator with 0.6V threshold.

The normal operation of the output voltage monitor after a

start-up cycle is shown in Figure 3. At time point 1, when the

FB pin voltage falls below 0.6V, the FB comparator output

goes high. RESET is pulled low by an internal N-channel

switch after a glitch filter delay at time point 2. When the

TIMER

C1

LTC4216**

**ADDITIONAL DETAILS

OMITTED FOR CLARITY

4216 F02

Figure 2. Output Voltage Monitor Block Diagram

VOUT

TIMER

RESET

12

3

4

5

6

VFB < 0.6V VFB > 0.6V VFB < 0.6V VFB > 0.6V

2µA

2µA

VTMR(TH)

POWER-GOOD

DELAY

GLITCH FILTER DELAY

4216 F03

Figure 3. Output Voltage Monitor

Waveforms in Normal Operation

4216fa

10

For more information www.linear.com/LTC4216

Share Link: