LTC3620 Ver la hoja de datos (PDF) - Linear Technology
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LTC3620 Datasheet PDF : 18 Pages
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LTC3620
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are for TA = 25°C (Note 2). VIN = 3.6V unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VFMIN
fEXT
IFMIN/MODE
ISW
IFB
FMIN/MODE Input Voltage High
FMIN/MODE Input Voltage Low
FMIN/MODE Input Frequency
FMIN/MODE Pin Leakage Current
Switch Leakage Current
VFB Pin Current
VUVLO
VLOBATB
RLOBATB
VHLOBATB
RPFET
RNFET
Undervoltage Lockout (UVLO)
LOBATB Threshold Voltage
LOBATB Pull-Down On-Resistance
LOBATB Hysteresis Voltage
RDS(ON) of P-channel FET (Note 4)
RDS(ON) of N-channel FET (Note 4)
VRUN = 0V, VSW = 0V or 5.5V, VIN = 5.5V
LTC3620, VFB = 0.6V
LTC3620-1, VFB = 1.1V
VIN Decreasing
VIN Decreasing
ISW = 50mA, VIN = 3.6V
ISW = –50mA, VIN = 3.6V
0.9
V
0.7
V
20
300
kHz
±0.01
±1
μA
±0.01
±1
μA
0
±30
nA
1.2
2.0
μA
2.7
2.8
2.9
V
2.93
3.0
3.08
V
15
Ω
100
mV
2.0
Ω
1.0
Ω
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3620 is tested under pulsed load conditions such that TJ ≈ TA.
LTC3620E is guaranteed to meet specifications from 0°C to 85°C
junction temperature. Specifications over the –40°C to 85°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. Note that the maximum
ambient temperature consistent with these specifications is determined by
specific operating conditions in conjunction with board layout, the rated
package thermal impedance and other environmental factors. The junction
temperature (TJ, in °C) is calculated from the ambient temperature (TA, in °C)
and power dissipation (PD, in Watts) according to the formula:
TJ = TA + (PD • θJA), where θJA (in °C/W) is the package thermal
impedance.
Note 3: The LTC3620 is tested in a proprietary test mode that connects VFB
to the output of the error amplifier.
Note 4: The DFN switch-on resistance is guaranteed by correlation to
wafer level measurements.
3620fa
3
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