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LTC2240CUP-12-PBF(RevB) Ver la hoja de datos (PDF) - Linear Technology

Número de pieza
componentes Descripción
Fabricante
LTC2240CUP-12-PBF
(Rev.:RevB)
Linear
Linear Technology Linear
LTC2240CUP-12-PBF Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LTC2240-12
TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 4)
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
DATA to CLKOUT Skew
(tC – tD) (Note 7)
l –0.6
0
0.6
ns
Pipeline Latency Full Rate CMOS
5
Cycles
Demuxed Interleaved
5
Cycles
Demuxed Simultaneous
5 and 6
Cycles
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3: When these pin voltages are taken below GND or above VDD, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above VDD without latchup.
Note 4: VDD = 2.5V, fSAMPLE = 170MHz, LVDS outputs, differential
ENC+/ENC= 2VP-P sine wave, input range = 2VP-P with differential
drive, unless otherwise noted.
Note 5: Integral nonlinearity is defined as the deviation of a code from
a “best straight line” fit to the transfer curve. The deviation is measured
from the center of the quantization band.
Note 6: Offset error is the offset voltage measured from –0.5 LSB when
the output code flickers between 0000 0000 0000 and 1111 1111 1111 in
2’s complement output mode.
Note 7: Guaranteed by design, not subject to test.
Note 8: Recommended operating conditions.
Note 9: VDD = 2.5V, fSAMPLE = 170MHz, differential ENC+/ENC= 2VP-P
sine wave, input range = 1VP-P with differential drive, output CLOAD = 5pF.
Note 10: SNR minimum and typical values are for LVDS mode. Typical
values for CMOS mode are typically 0.3dB lower.
Note 11: SFDR minimum values are for LVDS mode. Typical values are for
both LVDS and CMOS modes.
Note 12: SINAD minimum and typical values are for LVDS mode. Typical
values for CMOS mode are typically 0.3dB lower.
TYPICAL PERFORMANCE CHARACTERISTICS (TA = 25°C unless otherwise noted, Note 4)
Integral Nonlinearity
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
1024
2048
3072
OUTPUT CODE
4096
224012 G01
Differential Nonlinearity
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
1024
2048
3072
OUTPUT CODE
4096
224012 G02
8192 Point FFT, fIN = 5MHz,
–1dB, 2V Range, LVDS Mode
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
0
10 20 30 40 50 60 70 80
FREQUENCY (MHz)
224012 G03
224012fb
6

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