LTC1404C Ver la hoja de datos (PDF) - Linear Technology
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LTC1404C Datasheet PDF : 24 Pages
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LTC1404
DIGITAL I PUTS AND OUTPUTS (Note 5)
SYMBOL PARAMETER
IOZ
Hi-Z Output Leakage DOUT
COZ
Hi-Z Output Capacitance DOUT
ISOURCE Output Source Current
ISINK
Output Sink Current
WU
TI I G CHARACTERISTICS
CONDITIONS
VOUT = 0V to VCC
VOUT = 0V
VOUT = VCC
(Note 5, see Figures 12, 13, 14)
MIN TYP MAX UNITS
q
±10
µA
15
pF
– 10
mA
10
mA
SYMBOL
fSAMPLE(MAX)
tCONV
tACQ
fCLK
tCLK
tWK(NAP)
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
PARAMETER
CONDITIONS
Maximum Sampling Frequency
Conversion Time
Acquisition Time (Unipolar Mode)
(Bipolar Mode VSS = – 5V)
CLK Frequency
fCLK = 9.6MHz
CLK Pulse Width
(Note 6)
Time to Wake Up from Nap Mode
CLK Pulse Width to Return to Active Mode
CONV↑ to CLK↑ Setup Time
CONV↑ After Leading CLK↑
CONV Pulse Width
(Note 10)
Time from CLK↑ to Sample Mode
Aperture Delay of Sample-and-Hold
Jitter < 50ps
Minimum Delay Between Conversion (Unipolar Mode)
(Note 6)
(Bipolar Mode VSS = – 5V)
Delay Time, CLK↑ to DOUT Valid
CLOAD = 20pF
Delay Time, CLK↑ to DOUT Hi-Z
CLOAD = 20pF
Time from Previous Data Remains Valid After CLK↑
CLOAD = 20pF
MIN TYP MAX UNITS
q 600
kHz
1.36
µs
200
ns
160
ns
q 0.1
9.6
MHz
q 40
ns
350
ns
q 40
ns
q 70
ns
q0
ns
q 40
ns
60
ns
40
ns
q
220
310
ns
q
180
300
ns
q
40
70
ns
q
40
70
ns
q 10
30
ns
The q denotes specifications which apply over the full operating
temperature range; all other limits and typicals apply to TA = 25°C.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to GND.
Note 3: When these pin voltages are taken below VSS (ground for unipolar
mode) or above VCC, they will be clamped by internal diodes. This product
can handle input currents greater than 60mA without latch-up if the pin is
driven below VSS (ground for unipolar mode) or above VCC.
Note 4: When these pin voltages are taken below VSS (ground for unipolar
mode), they will be clamped by internal diodes. This product can handle
input currents greater than 60mA without latch-up if the pin is driven
below VSS (ground for unipolar mode). These pins are not clamped to VCC.
Note 5: VCC = 5V, fSAMPLE = 600kHz, tr = tf = 5ns unless otherwise
specified.
Note 6: Guaranteed by design, not subject to test.
Note 7: Linearity, offset and full-scale specifications apply for unipolar and
bipolar modes.
Note 8: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 9: Bipolar offset is the offset voltage measured from – 0.5LSB when
the output code flickers between 0000 0000 0000 and 1111 1111 1111.
Note 10: The rising edge of CONV starts a conversion. If CONV returns
low at a bit decision point during the conversion, it can create small errors.
For best performance, ensure that CONV returns low either within 100ns
after the conversion starts (i.e., before the first bit decision) or after the 14
clock cycles. (Figure 13 Timing Diagram).
4
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