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LTC1266

Synchronous Regulator Controller for N- or P-Channel MOSFETs

Linear Technology 

LTC1266

LTC1266-3.3/LTC1266-5

TYPICAL PERFOR A CE CHARACTERISTICS

Off-Time vs Output Voltage

100

VSENSE– = VOUT

80

60

40

20

LTC1266-3.3

LTC1266-5

0

0

1

2

3

4

5

OUTPUT VOLTAGE (V)

1266 G10

Operating Frequency

vs (VIN – VOUT) Voltage

3.0

VOUT = 3.3V

2.5

0°C

2.0

70°C

1.5

25°C

1.0

0.5

0

0 2 4 6 8 10 12 14 16

(VIN – VOUT) VOLTAGE (V)

1266 G11

Current Sense Threshold Voltage

200

MAX THRESHOLD

150

100

50

MIN THRESHOLD (Burst Mode

OPERATION ENABLED)

0

MIN THRESHOLD (Burst Mode

OPERATION INHIBIT)

–50

0

20

40

60

80 100

TEMPERATURE (°C)

1266 G12

PI FU CTIO S

TDRIVE (Pin 1): High Current Drive for Topside MOSFET.

This MOSFET can be either P-channel or N-channel, user

selectable by Pin 3. Voltage swing at this pin is from PWR

VIN to ground.

PWR VIN (Pin 2): Power Suppy for Drive Signals. Must be

closely decoupled to power ground (Pin 15).

PINV (Pin 3): Phase Invert. Sets the phase of the topside

driver to drive either a P-channel or an N-channel MOSFET

as follows:

P-channel: Pin 3 = 0V

N-channel: Pin 3 = PWR VIN

BINH (Pin 4): Burst Mode Operation Inhibit. A CMOS logic

high on this pin will disable the Burst Mode operation

feature forcing continuous operation down to zero load.

VIN (Pin 5): Main Supply Pin.

CT (Pin 6): External Capacitor. CT from Pin 4 to ground sets

the operating frequency. The actual frequency is also

dependent on the input voltage.

ITH (Pin 7): Gain Amplifier Decoupling Point. The current

comparator threshold increases with the Pin 7 voltage.

SENSE – (Pin 8): Connects to internal resistive divider

which sets the output voltage in LTC1266-3.3 and

LTC1266-5 versions. Pin 8 is also the (–) input for the

current comparator.

SENSE + (Pin 9): The (+) Input to the Current Comparator.

A built-in offset between Pins 8 and 9 in conjunction with

RSENSE sets the current trip threshold.

VFB (Pin 10): For the LTC1266 adjustable version, Pin 10

serves as the feedback pin from an external resistive

divider used to set the output voltage. On LTC1266-3.3

and LTC1266-5 versions this pin is not used.

SHDN (Pin 11): When grounded, the LTC1266 series

operates normally. Pulling Pin 11 high holds both

MOSFETs off and puts the LTC1266 in micropower shut-

down mode. Requires CMOS logic signal with tr, tf < 1µs.

Should not be left floating.

SGND (Pin 12): Small-Signal Ground. Must be routed

separately from other grounds to the (–) terminal of COUT.

LBIN (Pin 13): Input to the Low-Battery Comparator. This

input is compared to an internal 1.25V reference.

LBOUT (Pin 14): Open Drain Output of the Low-Battery

Comparator. This pin will sink current when Pin 13 is

below 1.25V.

PGND (Pin 15): Driver Power Ground. Connects to source

of N-channel MOSFET and the (–) terminal of CIN.

BDRIVE (Pin 16): High Current Drive for Bottom

N-Channel MOSFET. Voltage swing at Pin 16 is from

ground to PWR VIN.

6

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