LTC1264 Ver la hoja de datos (PDF) - Linear Technology
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LTC1264 Datasheet PDF : 16 Pages
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LTC1264
PI FU CTIO S
V +, V – (Pins 7, 19): Power Supply Pins. The V+ (Pin 7) and
the V – (Pin 19) should each be bypassed with a 0.1µF
capacitor to an adequate analog ground. The filter’s power
supplies should be isolated from other digital or high
voltage analog supplies. A low noise linear supply is
recommended. Using a switching power supply will lower
the signal-to-noise ratio of the filter. The supply during
power-up should have a slew rate less than 1V/µs. When
V + is applied before V – and V – is allowed to go above
ground, a diode should clamp V – to prevent latch-up.
Figures 1 and 2 show typical connections for dual and
single supply operation.
AGND (Pin 6): Analog Ground Pin. The filter performance
depends on the quality of the analog signal ground. For
either dual or single supply operation, an analog ground
plane surrounding the package is recommended. The
analog ground plane should be connected to any digital
ground at a single point. For dual supply operation, Pin 6
should be connected to the analog ground plane. For
single supply operation, Pin 6 should be biased at 1/2
supply and should be bypassed to the analog ground plane
with at least a 1µF capacitor (Figure 2). For single 5V
operation and fCLK greater than 1MHz, pin 6 should be
biased at 2V. This minimizes passband gain and phase
variations.
ANALOG
GROUND
PLANE
7.5V
0.1µF
1
24
2
23
3
22
–7.5V
4
21
*
5
20
0.1µF
6
19
7 LTC1264 18
8
17
9
16
10
15
11
14
12
13
STAR
SYSTEM
GROUND
DIGITAL
GROUND
PLANE
200Ω
CLOCK
SOURCE
* OPTIONAL, 1N4148, 1N5819
1264 F01
Figure 1. Dual Supply Ground Plane Connections
ANALOG
1
24
GROUND
PLANE
2
23
3
22
4
21
V+
5k
*5
20*
V+/2 6
19
1µF
5k V+ 7
LTC1264
18
*8
17*
9
16
10
15
11
14
12
13
STAR
SYSTEM
GROUND
DIGITAL
GROUND
PLANE
* FOR MODE 3, THE S NODE PINS 5, 8,
17, 20 SHOULD BE TIED TO PIN 6
200Ω
CLOCK
SOURCE
1264 F02
Figure 2. Single Supply Ground Plane Connections
1264fb
5
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