BLOCK DIAGRA
LTC1062
For Adjusting Oscillator Frequency, Insert a 50k Pot in Series with COSC. Use Two Times Calculated COSC
FB 1
AGND 2
V– 3
÷4
SWITCHED
CAPACITOR
NETWORK
fCLK
CLOCK GEN
÷ 1, 2, 4
8 BOUT
×1
7 OUT
6 V+
OSC
5 COSC
1062 BD
BY CONNECTING PIN 4 TO V+, AGND OR V–, THE
OUTPUT FREQUENCY OF THE INTERNAL CLOCK
GENERATOR IS THE OSCILLATOR FREQUENCY DI-
VIDED BY 1, 2, 4. THE (fCLK/fC) RATIO OF 100:1 IS
WITH RESPECT TO THE INTERNAL CLOCK GENERA-
TOR OUTPUT FREQUENCY. PIN 5 CAN BE DRIVEN
WITH AN EXTERNAL CMOS LEVEL CLOCK. THE
LTC1062 CAN ALSO BE SELF-CLOCKED BY CON-
NECTING AN EXTERNAL CAPACITOR (COSC) TO
GROUND (OR TO V– IF COSC IS POLARIZED). UNDER
THIS CONDITION AND WITH ±5V SUPPLIES, THE
INTERNAL OSCILLATOR FREQUENCY IS:
fOSC ≅ 140kHz [33pF/(33pF + COSC)]
AC TEST CIRCUIT
VIN
R = 25.8k
C = 0.01µF
50Ω
1
FB
8
BOUT
2
AGND
7
OUT
LTC1062
V– = –5V 3 V–
V+ 6
4
5
DIVIDER COSC
RATIO
5V
3+
7
LTC1052
2–
4
1
0.1µF
R′
5V
–5V
–5V
fCLK = 100kHz
5V
1062 F01
6 MEASURED
8
OUTPUT
0.1µF
FOR BEST MAX FLAT APPROXIMATION,
THE INPUT RC SHOULD BE SUCH AS:
1=
2πRC
fCLK
100
•
1
1.63
A 0.5k RESISTOR, R′, SHOULD BE USED IF
THE BIPOLAR EXTERNAL CLOCK IS APPLIED
BEFORE THE POWER SUPPLIES TURN ON
Figure 1
1062fd
5